{"id":2219454,"url":"http://patchwork.ozlabs.org/api/patches/2219454/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260403022513.9446-6-alif.zakuan.yuslaimi@altera.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260403022513.9446-6-alif.zakuan.yuslaimi@altera.com>","list_archive_url":null,"date":"2026-04-03T02:25:09","name":"[v1,5/9] arm: socfpga: s10: Enable system manager driver for Stratix10","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b818a0d3464336403f03046bd9b4003afaa0e616","submitter":{"id":90458,"url":"http://patchwork.ozlabs.org/api/people/90458/?format=json","name":"Yuslaimi, Alif Zakuan","email":"alif.zakuan.yuslaimi@altera.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260403022513.9446-6-alif.zakuan.yuslaimi@altera.com/mbox/","series":[{"id":498580,"url":"http://patchwork.ozlabs.org/api/series/498580/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=498580","date":"2026-04-03T02:25:04","name":"SoCFPGA: Update Boot Support for Stratix10 in U-Boot","version":1,"mbox":"http://patchwork.ozlabs.org/series/498580/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2219454/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219454/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=altera.com header.i=@altera.com header.a=rsa-sha256\n header.s=selector2 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5809ffb1-56d8-4b7a-184a-08de912851ca","X-MS-Exchange-CrossTenant-AuthSource":"PH7PR03MB7063.namprd03.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"03 Apr 2026 02:25:49.3198 (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"fbd72e03-d4a5-4110-adce-614d51f2077a","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n uOIvOdXwSZ2aASh2Aej7WCOLTRBz4rs/aAFIFygtnfUZ8M5wVxqIiNbjiE9sZVXkMiSbNm43DRoG1706uYK2JPZ9KmBzo/hMPU+br0ixahI=","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DSWPR03MB989164","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Alif Zakuan Yuslaimi \n\nThe base address of system manager can be retrieved\nusing DT framework through the system manager driver.\n\nEnable system manager support for Stratix10 by probing the\nsystem manager driver to initialize during SPL boot up.\n\nSigned-off-by: Alif Zakuan Yuslaimi \n---\n MAINTAINERS | 1 +\n arch/arm/dts/socfpga_stratix10-u-boot.dtsi | 6 ++++++\n arch/arm/mach-socfpga/Makefile | 1 +\n arch/arm/mach-socfpga/misc.c | 3 ++-\n arch/arm/mach-socfpga/spl_s10.c | 1 +\n board/altera/stratix10-socdk/Makefile | 7 +++++++\n board/altera/stratix10-socdk/socfpga.c | 12 ++++++++++++\n configs/socfpga_stratix10_defconfig | 1 +\n 8 files changed, 31 insertions(+), 1 deletion(-)\n create mode 100644 board/altera/stratix10-socdk/Makefile\n create mode 100644 board/altera/stratix10-socdk/socfpga.c","diff":"diff --git a/MAINTAINERS b/MAINTAINERS\nindex d2508d90c33..c58d8f85e33 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -156,6 +156,7 @@ S:\tMaintained\n T:\tgit https://source.denx.de/u-boot/custodians/u-boot-socfpga.git\n F:\tarch/arm/dts/socfpga_*\n F:\tarch/arm/mach-socfpga/\n+F:\tboard/altera/stratix10-socdk/\n F:\tboard/intel/agilex-socdk/\n F:\tconfigs/socfpga_*\n F:\tdrivers/ddr/altera/\ndiff --git a/arch/arm/dts/socfpga_stratix10-u-boot.dtsi b/arch/arm/dts/socfpga_stratix10-u-boot.dtsi\nindex ad4b383f704..89fa0e829f6 100644\n--- a/arch/arm/dts/socfpga_stratix10-u-boot.dtsi\n+++ b/arch/arm/dts/socfpga_stratix10-u-boot.dtsi\n@@ -13,6 +13,7 @@\n \taliases {\n \t\tspi0 = &qspi;\n \t\ti2c0 = &i2c1;\n+\t\tsysmgr = &sysmgr;\n \t\tfreeze_br0 = &freeze_controller;\n \t};\n \n@@ -283,6 +284,11 @@\n \t};\n };\n \n+&sysmgr {\n+\tcompatible = \"altr,sys-mgr\", \"syscon\";\n+\tbootph-all;\n+};\n+\n &uart0 {\n \tbootph-all;\n \tclock-frequency = <100000000>;\ndiff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile\nindex b6f35ddacc4..962dce67c64 100644\n--- a/arch/arm/mach-socfpga/Makefile\n+++ b/arch/arm/mach-socfpga/Makefile\n@@ -39,6 +39,7 @@ obj-y\t+= system_manager_soc64.o\n obj-y\t+= timer_s10.o\n obj-y\t+= wrap_handoff_soc64.o\n obj-y\t+= wrap_pll_config_soc64.o\n+obj-y\t+= altera-sysmgr.o\n endif\n \n ifdef CONFIG_ARCH_SOCFPGA_AGILEX\ndiff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c\nindex 1eef7893e54..418d7dfb572 100644\n--- a/arch/arm/mach-socfpga/misc.c\n+++ b/arch/arm/mach-socfpga/misc.c\n@@ -263,7 +263,8 @@ void socfpga_get_managers_addr(void)\n \n \tif (!IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX) &&\n \t !IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX7M) &&\n-\t !IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX5)) {\n+\t !IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX5) &&\n+\t !IS_ENABLED(CONFIG_ARCH_SOCFPGA_STRATIX10)) {\n \t\tret = socfpga_get_base_addr(\"altr,sys-mgr\",\n \t\t\t\t\t &socfpga_sysmgr_base);\n \t\tif (ret)\ndiff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c\nindex ce1d5d4c8ff..b05bec2cbc1 100644\n--- a/arch/arm/mach-socfpga/spl_s10.c\n+++ b/arch/arm/mach-socfpga/spl_s10.c\n@@ -48,6 +48,7 @@ void board_init_f(ulong dummy)\n \tif (ret)\n \t\thang();\n \n+\tsocfpga_get_sys_mgr_addr();\n \tsocfpga_get_managers_addr();\n \n \t/* Ensure watchdog is paused when debugging is happening */\ndiff --git a/board/altera/stratix10-socdk/Makefile b/board/altera/stratix10-socdk/Makefile\nnew file mode 100644\nindex 00000000000..416c121406a\n--- /dev/null\n+++ b/board/altera/stratix10-socdk/Makefile\n@@ -0,0 +1,7 @@\n+#\n+# Copyright (C) 2026 Altera Corporation \n+#\n+# SPDX-License-Identifier:\tGPL-2.0\n+#\n+\n+obj-y\t:= socfpga.o\ndiff --git a/board/altera/stratix10-socdk/socfpga.c b/board/altera/stratix10-socdk/socfpga.c\nnew file mode 100644\nindex 00000000000..f8facf79204\n--- /dev/null\n+++ b/board/altera/stratix10-socdk/socfpga.c\n@@ -0,0 +1,12 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/*\n+ * Copyright (C) 2026 Altera Corporation \n+ */\n+\n+#include \n+\n+int board_early_init_f(void)\n+{\n+\tsocfpga_get_sys_mgr_addr();\n+\treturn 0;\n+}\ndiff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig\nindex 6a6f1d98c16..726dd7d7c9f 100644\n--- a/configs/socfpga_stratix10_defconfig\n+++ b/configs/socfpga_stratix10_defconfig\n@@ -28,6 +28,7 @@ CONFIG_USE_BOOTARGS=y\n # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set\n CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y\n CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000\n+CONFIG_BOARD_EARLY_INIT_F=y\n CONFIG_SPL_MAX_SIZE=0x40000\n CONFIG_SPL_HAS_BSS_LINKER_SECTION=y\n CONFIG_SPL_BSS_START_ADDR=0x3ff00000\n","prefixes":["v1","5/9"]}