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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V2 6/8] arm64: dts: imx8mq-evk: Move power supply properties\n to Root Port node","Date":"Thu, 2 Apr 2026 18:10:05 +0800","Message-Id":"<20260402101007.208419-7-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260402101007.208419-1-sherry.sun@nxp.com>","References":"<20260402101007.208419-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SG2PR01CA0114.apcprd01.prod.exchangelabs.com\n (2603:1096:4:40::18) To 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Dxmm0HXam1TG+xToBXxtOiY5SC5jdls7Ix8t0P+iur0MYGuHtwA97HSIRj6otLH43NdvPaAfrfzTv5QkPhxZzJMQIud8YgPaCIqtYgbqcxqbSpQEVUzj/skOkRG1labUMdfhJtpozcB+OEjAjRo7Tpny4sfkXxlARm3eLTY2JsYMq5uVFQZ/vny3ysosKoh6Y4u4Z7eZBqEsaJ4Cqkbf00brX3UbpoduY4nVjEe4CdcbH9cX40pyACBOrCqxv1LEimmwIG2WALVsVgyYw9STTqOgd4BPWzDEzBHFc3QHFYvuRB+9bB7nOt2KPwHeAT8onWm73SweYLlBGWyqvOe7D9LhdyioweAFVW5igrl+CsUNzm5y6inW/SdJ55I/uiJQ/K/ftUDzW5RgTZk/3K60dCdrrH5zejKkzmLvPSe2gTdH1sUnl9hwXo019e8UyFXbItrK/Ci5LCYU9UXdfC93YYTR10lkHRYLkcYNjqTF4khKoTO4gRZaphkWaUZpmNpLDlBlf8dciEK6nMdy+rHkXpKiP9MNpOwecZ8/6VV9CvP01LGDaeZYSrH8Tf3vpoaqMJhpDVzkxBNWNfD25+FYJgpnL2nd1oa8ipXCOqo5QCz+tty2GEDU4Zssfrb1T3v+1vOBKyjuIChiFTSo2NZzBy3zyBta/IbB6n5zXDZJQ0wn4F6wP4Lq4hDxTKP/q3Z19vTy9JIc4MNu7TghsIwjJBRxK3aJHVvwiCwfWLl/8axlUy4otk4PGPktYBswtdv4GsRZgC2qko3C4VF4HfD70Ic7sMWtX1X42cPEZABxNbwwtCFZ928gjJZBUIG+6tKqXNwph3w9znAFWpee1YcumAV2jQrWud+ZAB+HLKUwh22N+lMeAkBKeGZpiUW8tz/BdrmziiULy2ovJjNCTNp1MMdehxJedaYXhKBbcM8mcZtCo73Gju8yTtkLcq7WxcReYL+Ygde05wvfdh9r78HpUKL+dFAlmf2QjJ54GLOAktxqOqOV+BAgKMrBusN4asVkB6eTVRh/OWunEy63M7ZWDIX7l31FECK+/2eHk9FBaH3hr90fsod5krDxy+L/bcpvLrtl/m5OQmvJOniHpHKzJg15xdXM26Ur5XMm0krBNPd3wEfg+I8/QYWiiohEjLTBsvQfwg4d3XUaHqzZT/7juB48VffWP3VcjLmUNIinA8GxxU8K1P76oUjA/lhK0o+MnhfFXlPp99L0MfQoTNKCUcaSuoqjdCJJVH6Y2dBsvZuSLjopwTCc24fboOymG+Z6cQwkH4U+vfWnbPlg4xeBOCfpNb9GgBMBCACHrZ31OYd0rG1QAatU7pwu9X9qWp3aNsnSwfS6qtx871ftuznocVag/KHAtWMphLkY+Ay38NP1WhiFf/pGRqnqf1JPDxBODKZ8tO8cUFl++PlxkwMhlOZaNIsJXbHR2qrcfLB+uG7m+qZ7uYCesEBcDxyS0UboszsjPcGvr+VZQJE7TygKV+UJ7FATkAzVmqV2AymSBJfvyf5bLpdL7/7VsXl8+/kja1tSV0hQgr87MZBkQMrpflE5O82YG9AX8EyBcmIXxGti+43Q7i3F6TY6WmF8wAxD9q284YPAjR3YyWhIC+YJ+UQMylM1zEyBwP4UbO1viZgLhHPqJwMlRSmiePwRQKs01CpyBt6dQJPFnOpPzSkXhW5PPDSAhphH0i8cPaxIrbl6wx/VY2fVPduiJc2QES3vKjWj2RxxfXXyVTswBG81BQ==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 5518e394-055e-40f4-40c0-08de909ffc9f","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"02 Apr 2026 10:09:54.8972\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n lGrXalPpBpfYmAHQw4qkY57XleuGpXqppM52wnMVKceZlA119/VcVoWTpSwq850ipPlVjjkHAZ7+OTB/LGIX1Q==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AS8PR04MB8706"},"content":"Move the vpcie-supply and vpcie3v3aux-supply properties from the PCIe\ncontroller node to the Root Port child node to support the new PCI\npwrctrl framework.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)","diff":"diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts\nindex e7d87ea81b69..75d9b25d1f0e 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts\n+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts\n@@ -403,8 +403,6 @@ &pcie1 {\n \t\t <&pcie0_refclk>,\n \t\t <&clk IMX8MQ_CLK_PCIE2_PHY>,\n \t\t <&clk IMX8MQ_CLK_PCIE2_AUX>;\n-\tvpcie-supply = <®_pcie1>;\n-\tvpcie3v3aux-supply = <®_pcie1>;\n \tvph-supply = <&vgen5_reg>;\n \tsupports-clkreq;\n \tstatus = \"okay\";\n@@ -422,6 +420,8 @@ &pcie1_ep {\n \n &pcie1_port0 {\n \treset-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;\n+\tvpcie-supply = <®_pcie1>;\n+\tvpcie3v3aux-supply = <®_pcie1>;\n };\n \n &pgc_gpu {\n","prefixes":["V2","6/8"]}