{"id":2219002,"url":"http://patchwork.ozlabs.org/api/patches/2219002/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260402095132.29245-8-thuth@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260402095132.29245-8-thuth@redhat.com>","list_archive_url":null,"date":"2026-04-02T09:51:29","name":"[07/10] target/i386: Adjust the suffix of the CPU devices to 32-bit/64-bit mode","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"591f1542f9640b5f295503e972200bb3bbe1675e","submitter":{"id":66152,"url":"http://patchwork.ozlabs.org/api/people/66152/?format=json","name":"Thomas Huth","email":"thuth@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260402095132.29245-8-thuth@redhat.com/mbox/","series":[{"id":498459,"url":"http://patchwork.ozlabs.org/api/series/498459/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498459","date":"2026-04-02T09:51:22","name":"Deprecate the qemu-system-i386 binary","version":1,"mbox":"http://patchwork.ozlabs.org/series/498459/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2219002/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219002/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=ZHJG/iOh;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fmcbK4PxVz1yGJ\n\tfor ; Thu, 02 Apr 2026 20:52:29 +1100 (AEDT)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1w8Eio-00077c-PY; Thu, 02 Apr 2026 05:52:18 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1w8Eik-00076Q-N4\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 05:52:14 -0400","from us-smtp-delivery-124.mimecast.com ([170.10.129.124])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1w8Eij-0008So-5q\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 05:52:14 -0400","from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com\n (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by\n relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,\n cipher=TLS_AES_256_GCM_SHA384) id us-mta-421-7i9MxwZBPai4bpNIaxBBiw-1; Thu,\n 02 Apr 2026 05:52:09 -0400","from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com\n (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS\n id E4FD21956063; Thu, 2 Apr 2026 09:52:07 +0000 (UTC)","from thuth-p1g4.redhat.com (unknown [10.44.34.44])\n by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP\n id AB16C196B088; Thu, 2 Apr 2026 09:52:03 +0000 (UTC)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1775123532;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=pyTPQJzVYC5in5/dSMWzlphXYjyzR9HnC+1W6LLvFtY=;\n b=ZHJG/iOhB21yb6RmD8tL7wgilgLLoa7B4orLxhQhTCaxBYPx2inVEzuwYTlInEN78fdwPh\n upn2oWp1PoUcJufj7OYj6DRJ0Sb1ZOkkOoDSClt1HefhVzcsnuXIUqJZa0KwxoFz3+5T6s\n fQHZG7V09nuN6lgubmTqGLAeRXKhec8=","X-MC-Unique":"7i9MxwZBPai4bpNIaxBBiw-1","X-Mimecast-MFC-AGG-ID":"7i9MxwZBPai4bpNIaxBBiw_1775123528","From":"Thomas Huth ","To":"Paolo Bonzini ,\n\tqemu-devel@nongnu.org","Cc":"Pierrick Bouvier ,\n \"Michael S. Tsirkin\" ,\n Richard Henderson , =?utf-8?q?Philippe_Mathie?=\n\t=?utf-8?q?u-Daud=C3=A9?= , Zhao Liu ,\n Thomas Huth ","Subject":"[PATCH 07/10] target/i386: Adjust the suffix of the CPU devices to\n 32-bit/64-bit mode","Date":"Thu, 2 Apr 2026 11:51:29 +0200","Message-ID":"<20260402095132.29245-8-thuth@redhat.com>","In-Reply-To":"<20260402095132.29245-1-thuth@redhat.com>","References":"<20260402095132.29245-1-thuth@redhat.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Scanned-By":"MIMEDefang 3.0 on 10.30.177.17","Received-SPF":"pass client-ip=170.10.129.124; envelope-from=thuth@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"27","X-Spam_score":"2.7","X-Spam_bar":"++","X-Spam_report":"(2.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01,\n RCVD_IN_SBL_CSS=3.335, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=1, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Thomas Huth \n\nqemu-system-i386 uses the suffix \"-i386-cpu\" for the CPU devices, while\nqemu-system-x86_64 uses the suffix \"-x86_64-cpu\" instead. For supporting\nboth targets in one binary, we have to adjust the suffix during runtime.\n\nSigned-off-by: Thomas Huth \n---\n target/i386/cpu.h | 3 ++-\n target/i386/cpu.c | 29 ++++++++++++++++++++++++-----\n target/i386/host-cpu.c | 6 +++++-\n 3 files changed, 31 insertions(+), 7 deletions(-)","diff":"diff --git a/target/i386/cpu.h b/target/i386/cpu.h\nindex 9d71d1dcca7..38309773ea8 100644\n--- a/target/i386/cpu.h\n+++ b/target/i386/cpu.h\n@@ -2775,10 +2775,11 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);\n uint64_t cpu_get_tsc(CPUX86State *env);\n \n #define CPU_RESOLVING_TYPE TYPE_X86_CPU\n+#define I386_CPU_TYPE_SUFFIX \"-i386-cpu\"\n \n #ifdef TARGET_X86_64\n #define TARGET_DEFAULT_CPU_TYPE \\\n- (target_i386() ? X86_CPU_TYPE_NAME(\"qemu32\") \\\n+ (target_i386() ? \"qemu32\" I386_CPU_TYPE_SUFFIX \\\n : X86_CPU_TYPE_NAME(\"qemu64\"))\n #else\n #define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME(\"qemu32\")\ndiff --git a/target/i386/cpu.c b/target/i386/cpu.c\nindex e30d47831d6..98e03cb9a88 100644\n--- a/target/i386/cpu.c\n+++ b/target/i386/cpu.c\n@@ -2276,7 +2276,11 @@ void host_cpuid(uint32_t function, uint32_t count,\n */\n static char *x86_cpu_type_name(const char *model_name)\n {\n- return g_strdup_printf(X86_CPU_TYPE_NAME(\"%s\"), model_name);\n+ if (target_i386()) {\n+ return g_strdup_printf(\"%s\" I386_CPU_TYPE_SUFFIX, model_name);\n+ } else {\n+ return g_strdup_printf(X86_CPU_TYPE_NAME(\"%s\"), model_name);\n+ }\n }\n \n static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)\n@@ -2288,7 +2292,16 @@ static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)\n static char *x86_cpu_class_get_model_name(X86CPUClass *cc)\n {\n const char *class_name = object_class_get_name(OBJECT_CLASS(cc));\n- assert(g_str_has_suffix(class_name, X86_CPU_TYPE_SUFFIX));\n+ const char *type_suffix;\n+\n+ if (target_i386()) {\n+ type_suffix = I386_CPU_TYPE_SUFFIX;\n+ } else {\n+ type_suffix = X86_CPU_TYPE_SUFFIX;\n+ }\n+\n+ assert(g_str_has_suffix(class_name, type_suffix));\n+\n return cpu_model_from_type(class_name);\n }\n \n@@ -7266,7 +7279,7 @@ static void max_x86_cpu_initfn(Object *obj)\n }\n }\n \n-static const TypeInfo max_x86_cpu_type_info = {\n+static TypeInfo max_x86_cpu_type_info = {\n .name = X86_CPU_TYPE_NAME(\"max\"),\n .parent = TYPE_X86_CPU,\n .instance_init = max_x86_cpu_initfn,\n@@ -7884,7 +7897,8 @@ static gint x86_cpu_list_compare(gconstpointer a, gconstpointer b, gpointer d)\n \n static GSList *get_sorted_cpu_model_list(void)\n {\n- GSList *list = object_class_get_list(TYPE_X86_CPU, false);\n+ GSList *list = object_class_get_list(target_i386() ?\n+ \"i386-cpu\" : TYPE_X86_CPU, false);\n list = g_slist_sort_with_data(list, x86_cpu_list_compare, NULL);\n return list;\n }\n@@ -10818,7 +10832,7 @@ static void x86_cpu_base_class_init(ObjectClass *oc, const void *data)\n xcc->ordering = 8;\n }\n \n-static const TypeInfo x86_base_cpu_type_info = {\n+static TypeInfo x86_base_cpu_type_info = {\n .name = X86_CPU_TYPE_NAME(\"base\"),\n .parent = TYPE_X86_CPU,\n .class_init = x86_cpu_base_class_init,\n@@ -10832,6 +10846,11 @@ static void x86_cpu_register_types(void)\n for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) {\n x86_register_cpudef_types(&builtin_x86_defs[i]);\n }\n+\n+ if (target_i386()) {\n+ x86_base_cpu_type_info.name = \"base\" I386_CPU_TYPE_SUFFIX;\n+ max_x86_cpu_type_info.name = \"max\" I386_CPU_TYPE_SUFFIX;\n+ }\n type_register_static(&max_x86_cpu_type_info);\n type_register_static(&x86_base_cpu_type_info);\n }\ndiff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c\nindex d5e2bb5e187..a6b8bb484b3 100644\n--- a/target/i386/host-cpu.c\n+++ b/target/i386/host-cpu.c\n@@ -179,7 +179,7 @@ static void host_cpu_class_init(ObjectClass *oc, const void *data)\n g_strdup_printf(\"processor with all supported host features \");\n }\n \n-static const TypeInfo host_cpu_type_info = {\n+static TypeInfo host_cpu_type_info = {\n .name = X86_CPU_TYPE_NAME(\"host\"),\n .parent = X86_CPU_TYPE_NAME(\"max\"),\n .class_init = host_cpu_class_init,\n@@ -187,6 +187,10 @@ static const TypeInfo host_cpu_type_info = {\n \n static void host_cpu_type_init(void)\n {\n+ if (target_i386()) {\n+ host_cpu_type_info.name = \"host\" I386_CPU_TYPE_SUFFIX;\n+ host_cpu_type_info.parent = \"max\" I386_CPU_TYPE_SUFFIX;\n+ }\n type_register_static(&host_cpu_type_info);\n }\n \n","prefixes":["07/10"]}