{"id":2216049,"url":"http://patchwork.ozlabs.org/api/patches/2216049/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325184259.366-4-alireza.sanaee@huawei.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260325184259.366-4-alireza.sanaee@huawei.com>","list_archive_url":null,"date":"2026-03-25T18:42:51","name":"[3/9] hw/cxl: Hook up tagged host memory backends at runtime for DC extents","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"16635470c2336ddbdfae2701164e795e8b7b26c1","submitter":{"id":90159,"url":"http://patchwork.ozlabs.org/api/people/90159/?format=json","name":"Alireza Sanaee","email":"alireza.sanaee@huawei.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325184259.366-4-alireza.sanaee@huawei.com/mbox/","series":[{"id":497484,"url":"http://patchwork.ozlabs.org/api/series/497484/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497484","date":"2026-03-25T18:42:48","name":"Application Specific Tagged Memory Support in CXL Type 3 Devices","version":1,"mbox":"http://patchwork.ozlabs.org/series/497484/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2216049/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2216049/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":"legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)","Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgwng06NCz1xy3\n\tfor ; Thu, 26 Mar 2026 05:45:11 +1100 (AEDT)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1w5TDp-0003Pb-Sz; Wed, 25 Mar 2026 14:44:53 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w5TDn-0003P6-9g\n for qemu-devel@nongnu.org; Wed, 25 Mar 2026 14:44:51 -0400","from frasgout.his.huawei.com ([185.176.79.56])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w5TDl-0007Mw-Dl\n for qemu-devel@nongnu.org; Wed, 25 Mar 2026 14:44:51 -0400","from mail.maildlp.com (unknown [172.18.224.150])\n by frasgout.his.huawei.com (SkyGuard) with ESMTPS id 4fgwmW4qzZzHnGjr;\n Thu, 26 Mar 2026 02:44:11 +0800 (CST)","from dubpeml500005.china.huawei.com (unknown [7.214.145.207])\n by mail.maildlp.com (Postfix) with ESMTPS id 7F6D74056B;\n Thu, 26 Mar 2026 02:44:47 +0800 (CST)","from a2303103017.china.huawei.com (10.47.66.203) by\n dubpeml500005.china.huawei.com (7.214.145.207) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1544.11; Wed, 25 Mar 2026 18:44:46 +0000"],"To":"","CC":", , ,\n , ,\n , , ,\n , , ,\n , ","Subject":"[PATCH 3/9] hw/cxl: Hook up tagged host memory backends at runtime\n for DC extents","Date":"Wed, 25 Mar 2026 18:42:51 +0000","Message-ID":"<20260325184259.366-4-alireza.sanaee@huawei.com>","X-Mailer":"git-send-email 2.51.0.windows.2","In-Reply-To":"<20260325184259.366-1-alireza.sanaee@huawei.com>","References":"<20260325184259.366-1-alireza.sanaee@huawei.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-Originating-IP":"[10.47.66.203]","X-ClientProxiedBy":"lhrpeml500011.china.huawei.com (7.191.174.215) To\n dubpeml500005.china.huawei.com (7.214.145.207)","Received-SPF":"pass client-ip=185.176.79.56;\n envelope-from=alireza.sanaee@huawei.com; helo=frasgout.his.huawei.com","X-Spam_score_int":"-41","X-Spam_score":"-4.2","X-Spam_bar":"----","X-Spam_report":"(-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Reply-to":"Alireza Sanaee ","From":"Alireza Sanaee via qemu development ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"When a type3 device is created with dc-regions-total-size instead of an\ninitial volatile-dc-memdev, prescriptive DC add requests need a way to name\nthe backend to attach to the accepted extent.\n\nTeach the QMP and mailbox paths to carry that tag through the lazy\ndynamic-capacity flow. In the add path, resolve the tag to a generic host\nmemory backend, reject reuse of an already-mapped backend, and verify that\nthe backend size matches the requested extent.\n\nStore the selected backend metadata on the pending extent so a later patch\ncan bind the accepted extent to the chosen backend when the host\nacknowledges the request.\n\nSigned-off-by: Alireza Sanaee \n---\n hw/cxl/cxl-mailbox-utils.c | 8 ----\n hw/mem/cxl_type3.c | 77 ++++++++++++++++++++++++++++++++------\n 2 files changed, 65 insertions(+), 20 deletions(-)","diff":"diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c\nindex e6e136cf44..c83b5f90d4 100644\n--- a/hw/cxl/cxl-mailbox-utils.c\n+++ b/hw/cxl/cxl-mailbox-utils.c\n@@ -4270,10 +4270,6 @@ static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,\n CXLType3Dev *ct3d = CXL_TYPE3(cci->d);\n int i, rc;\n \n- if (ct3d->dc.total_capacity_cmd) {\n- return CXL_MBOX_UNSUPPORTED;\n- }\n-\n switch (in->selection_policy) {\n case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE: {\n /* Adding extents exceeds device's extent tracking ability. */\n@@ -4361,10 +4357,6 @@ static CXLRetCode cmd_fm_initiate_dc_release(const struct cxl_cmd *cmd,\n CXLType3Dev *ct3d = CXL_TYPE3(cci->d);\n int i, rc;\n \n- if (ct3d->dc.total_capacity_cmd) {\n- return CXL_MBOX_UNSUPPORTED;\n- }\n-\n switch (in->flags & CXL_EXTENT_REMOVAL_POLICY_MASK) {\n case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE: {\n CXLDCExtentList updated_list;\ndiff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c\nindex 45fb6c55bc..569184975f 100644\n--- a/hw/mem/cxl_type3.c\n+++ b/hw/mem/cxl_type3.c\n@@ -30,6 +30,7 @@\n #include \"system/numa.h\"\n #include \"hw/cxl/cxl.h\"\n #include \"hw/pci/msix.h\"\n+#include \"qemu/uuid.h\"\n \n /* type3 device private */\n enum CXL_T3_MSIX_VECTOR {\n@@ -2289,13 +2290,42 @@ bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,\n return false;\n }\n \n+static bool cxl_device_lazy_dynamic_capacity_init(CXLType3Dev *ct3d,\n+ const char *tag,\n+ Error **errp)\n+{\n+ MemoryRegion *dc_mr;\n+\n+ ct3d->dc.host_dc = host_memory_backend_find_by_tag(tag);\n+ if (!ct3d->dc.host_dc) {\n+ error_setg(errp, \"dynamic capacity must have a backing device\");\n+ return false;\n+ }\n+\n+ dc_mr = host_memory_backend_get_memory(ct3d->dc.host_dc);\n+ if (!dc_mr) {\n+ error_setg(errp, \"dynamic capacity must have a backing device\");\n+ return false;\n+ }\n+\n+ if (host_memory_backend_is_mapped(ct3d->dc.host_dc)) {\n+ error_setg(errp,\n+ \"memory backend %s is already mapped and cannot be reused\",\n+ object_get_canonical_path_component(\n+ OBJECT(ct3d->dc.host_dc)));\n+ return false;\n+ }\n+\n+ return true;\n+}\n+\n /*\n * The main function to process dynamic capacity event with extent list.\n * Currently DC extents add/release requests are processed.\n */\n static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,\n uint16_t hid, CXLDCEventType type, uint8_t rid,\n- CxlDynamicCapacityExtentList *records, Error **errp)\n+ const char *tag, CxlDynamicCapacityExtentList *records, Error **errp)\n {\n Object *obj;\n CXLType3Dev *dcd;\n@@ -2303,7 +2333,8 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,\n CxlDynamicCapacityExtentList *list;\n CXLDCExtentGroup *group = NULL;\n g_autofree CXLDCExtentRaw *extents = NULL;\n- uint64_t dpa, offset, len, block_size;\n+ uint64_t dpa, offset, block_size;\n+ uint64_t len = 0;\n g_autofree unsigned long *blk_bitmap = NULL;\n int i;\n \n@@ -2319,13 +2350,6 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,\n return;\n }\n \n- if (dcd->dc.total_capacity_cmd) {\n- error_setg(errp,\n- \"dc-regions-total-size is set: extent add/release via QMP \"\n- \"not yet supported without a backing device at init\");\n- return;\n- }\n-\n if (rid >= dcd->dc.num_regions) {\n error_setg(errp, \"region id is too large\");\n return;\n@@ -2334,6 +2358,8 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,\n blk_bitmap = bitmap_new(dcd->dc.regions[rid].len / block_size);\n \n /* Sanity check and count the extents */\n+ QemuUUID uuid;\n+ qemu_uuid_parse(tag, &uuid);\n list = records;\n while (list) {\n offset = list->value->offset;\n@@ -2392,6 +2418,31 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,\n num_extents++;\n }\n \n+ if (type == DC_EVENT_ADD_CAPACITY && dcd->dc.total_capacity_cmd) {\n+ MemoryRegion *host_dc_mr;\n+ uint64_t size;\n+\n+ if (num_extents > 1) {\n+ error_setg(errp, \"Only single extent add is supported currently\");\n+ return;\n+ }\n+\n+ if (!cxl_device_lazy_dynamic_capacity_init(dcd, tag, errp)) {\n+ return;\n+ }\n+\n+ host_dc_mr = host_memory_backend_get_memory(dcd->dc.host_dc);\n+ size = memory_region_size(host_dc_mr);\n+\n+ if (size != len) {\n+ error_setg(errp,\n+ \"Host memory backend size 0x%\" PRIx64\n+ \" does not match extent length 0x%\" PRIx64,\n+ size, len);\n+ return;\n+ }\n+ }\n+\n /* Create extent list for event being passed to host */\n i = 0;\n list = records;\n@@ -2403,7 +2454,7 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,\n \n extents[i].start_dpa = dpa;\n extents[i].len = len;\n- memset(extents[i].tag, 0, 0x10);\n+ memcpy(extents[i].tag, &uuid.data, 0x10);\n extents[i].shared_seq = 0;\n if (type == DC_EVENT_ADD_CAPACITY) {\n group = cxl_insert_extent_to_extent_group(group,\n@@ -2434,7 +2485,8 @@ void qmp_cxl_add_dynamic_capacity(const char *path, uint16_t host_id,\n case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE:\n qmp_cxl_process_dynamic_capacity_prescriptive(path, host_id,\n DC_EVENT_ADD_CAPACITY,\n- region, extents, errp);\n+ region, tag,\n+ extents, errp);\n return;\n default:\n error_setg(errp, \"Selection policy not supported\");\n@@ -2465,7 +2517,8 @@ void qmp_cxl_release_dynamic_capacity(const char *path, uint16_t host_id,\n switch (removal_policy) {\n case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE:\n qmp_cxl_process_dynamic_capacity_prescriptive(path, host_id, type,\n- region, extents, errp);\n+ region, tag,\n+ extents, errp);\n return;\n default:\n error_setg(errp, \"Removal policy not supported\");\n","prefixes":["3/9"]}