{"id":2216045,"url":"http://patchwork.ozlabs.org/api/patches/2216045/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260325182849.84660-1-biju.das.jz@bp.renesas.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260325182849.84660-1-biju.das.jz@bp.renesas.com>","list_archive_url":null,"date":"2026-03-25T18:28:47","name":"[v2] pinctrl: renesas: rzg2l: Fix save/restore of {IOLH,IEN,PUPD,SMT} registers","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"3052d8dedc9eb2cda71845664909d29f8cecd0fb","submitter":{"id":87968,"url":"http://patchwork.ozlabs.org/api/people/87968/?format=json","name":"Biju","email":"biju.das.au@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260325182849.84660-1-biju.das.jz@bp.renesas.com/mbox/","series":[{"id":497483,"url":"http://patchwork.ozlabs.org/api/series/497483/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497483","date":"2026-03-25T18:28:47","name":"[v2] pinctrl: renesas: rzg2l: Fix save/restore of {IOLH,IEN,PUPD,SMT} registers","version":2,"mbox":"http://patchwork.ozlabs.org/series/497483/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2216045/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2216045/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=TKD0PHgC;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; 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Extend the code to also support ports with\nvariable pincfg per pin, so that {IOLH,IEN,PUPD,SMT} registers are\ncorrectly saved and restored for all pins.\n\nFixes: 254203f9a94c (\"pinctrl: renesas: rzg2l: Add suspend/resume support\")\nSigned-off-by: Biju Das \n---\nv1->v2:\n * Updated commit description\n * Improved the logic.\n---\n drivers/pinctrl/renesas/pinctrl-rzg2l.c | 10 +++++++++-\n 1 file changed, 9 insertions(+), 1 deletion(-)","diff":"diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c\nindex 863e779dda02..e20d199833ee 100644\n--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c\n+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c\n@@ -3001,9 +3001,12 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen\n {\n \tu32 nports = pctrl->data->n_port_pins / RZG2L_PINS_PER_PORT;\n \tstruct rzg2l_pinctrl_reg_cache *cache = pctrl->cache;\n+\tu32 pin_off = 0;\n \n-\tfor (u32 port = 0; port < nports; port++) {\n+\tfor (u32 port = 0; port < nports; port++, pin_off += RZG2L_PINS_PER_PORT) {\n+\t\tconst struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[pin_off];\n \t\tbool has_iolh, has_ien, has_pupd, has_smt;\n+\t\tu64 *pin_data = pin_desc->drv_data;\n \t\tu32 off, caps;\n \t\tu8 pincnt;\n \t\tu64 cfg;\n@@ -3012,6 +3015,11 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen\n \t\toff = RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg);\n \t\tpincnt = hweight8(FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg));\n \n+\t\tif (cfg & RZG2L_VARIABLE_CFG) {\n+\t\t\tfor (unsigned int i = 1; i < RZG2L_PINS_PER_PORT; i++)\n+\t\t\t\tcfg |= *pin_data++;\n+\t\t}\n+\n \t\tcaps = FIELD_GET(PIN_CFG_MASK, cfg);\n \t\thas_iolh = !!(caps & (PIN_CFG_IOLH_A | PIN_CFG_IOLH_B | PIN_CFG_IOLH_C));\n \t\thas_ien = !!(caps & PIN_CFG_IEN);\n","prefixes":["v2"]}