{"id":2216021,"url":"http://patchwork.ozlabs.org/api/patches/2216021/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325164453.72127-14-pbonzini@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260325164453.72127-14-pbonzini@redhat.com>","list_archive_url":null,"date":"2026-03-25T16:44:47","name":"[PULL,13/19] target/i386: emulate: segmentation rework","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"559464fcbdb05f9d3b4030dad4c157e4c0656287","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/?format=json","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325164453.72127-14-pbonzini@redhat.com/mbox/","series":[{"id":497473,"url":"http://patchwork.ozlabs.org/api/series/497473/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497473","date":"2026-03-25T16:44:34","name":"[PULL,01/19] tests/functional: preserve PYTHONPATH entries","version":1,"mbox":"http://patchwork.ozlabs.org/series/497473/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2216021/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2216021/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com 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envelope-from=pbonzini@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nMake accesses to segments all go through read_segment_descriptor\nto be able to fetch segment state on-demand.\n\nSwitch away from SegmentCache to the x86_segment_descriptor\nthat is already used by read_segment_descriptor.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\nLink: https://lore.kernel.org/r/20260324151323.74473-11-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>\n---\n target/i386/emulate/x86_helpers.c | 50 ++++++++++++-------------------\n 1 file changed, 19 insertions(+), 31 deletions(-)","diff":"diff --git a/target/i386/emulate/x86_helpers.c b/target/i386/emulate/x86_helpers.c\nindex c817015ef92..63bae3582fe 100644\n--- a/target/i386/emulate/x86_helpers.c\n+++ b/target/i386/emulate/x86_helpers.c\n@@ -43,49 +43,37 @@ static CpuMode cpu_mode(CPUState *cpu)\n     return m;\n }\n \n-static bool segment_type_ro(const SegmentCache *seg)\n+static bool segment_type_ro(const x86_segment_descriptor desc)\n {\n-    uint32_t type_ = (seg->flags >> DESC_TYPE_SHIFT) & 15;\n+    uint32_t type_ = desc.type;\n     return (type_ & (~RWRX_SEGMENT_TYPE)) == 0;\n }\n \n-static bool segment_type_code(const SegmentCache *seg)\n+static bool segment_type_code(const x86_segment_descriptor desc)\n {\n-    uint32_t type_ = (seg->flags >> DESC_TYPE_SHIFT) & 15;\n+    uint32_t type_ = desc.type;\n     return (type_ & CODE_SEGMENT_TYPE) != 0;\n }\n \n-static bool segment_expands_down(const SegmentCache *seg)\n+static bool segment_expands_down(const x86_segment_descriptor desc)\n {\n-    uint32_t type_ = (seg->flags >> DESC_TYPE_SHIFT) & 15;\n+    uint32_t type_ = desc.type;\n \n-    if (segment_type_code(seg)) {\n+    if (segment_type_code(desc)) {\n         return false;\n     }\n \n     return (type_ & EXPAND_DOWN_SEGMENT_TYPE) != 0;\n }\n \n-static uint32_t segment_limit(const SegmentCache *seg)\n+static uint8_t segment_db(const x86_segment_descriptor desc)\n {\n-    uint32_t limit = seg->limit;\n-    uint32_t granularity = (seg->flags & DESC_G_MASK) != 0;\n-\n-    if (granularity != 0) {\n-        limit = (limit << 12) | 0xFFF;\n-    }\n-\n-    return limit;\n+    return desc.db;\n }\n \n-static uint8_t segment_db(const SegmentCache *seg)\n+static uint32_t segment_max_limit(const x86_segment_descriptor desc)\n {\n-    return (seg->flags >> DESC_B_SHIFT) & 1;\n-}\n-\n-static uint32_t segment_max_limit(const SegmentCache *seg)\n-{\n-    if (segment_db(seg) != 0) {\n+    if (segment_db(desc) != 0) {\n         return 0xFFFFFFFF;\n     }\n     return 0xFFFF;\n@@ -96,15 +84,15 @@ static int linearize(CPUState *cpu,\n                      X86Seg seg_idx)\n {\n     enum CpuMode mode;\n-    X86CPU *x86_cpu = X86_CPU(cpu);\n-    CPUX86State *env = &x86_cpu->env;\n-    SegmentCache *seg = &env->segs[seg_idx];\n-    target_ulong base = seg->base;\n+    struct x86_segment_descriptor desc;\n+    target_ulong base;\n     target_ulong logical_addr_32b;\n     uint32_t limit;\n     /* TODO: the emulator will not pass us \"write\" indicator yet */\n     bool write = false;\n \n+    emul_ops->read_segment_descriptor(cpu, &desc, seg_idx);\n+    base = x86_segment_base(&desc);\n     mode = cpu_mode(cpu);\n \n     switch (mode) {\n@@ -116,21 +104,21 @@ static int linearize(CPUState *cpu,\n         break;\n     case PROTECTED_MODE:\n     case REAL_MODE:\n-        if (segment_type_ro(seg) && write) {\n+        if (segment_type_ro(desc) && write) {\n             error_report(\"Cannot write to read-only segment\");\n             return -1;\n         }\n \n         logical_addr_32b = logical_addr & 0xFFFFFFFF;\n-        limit = segment_limit(seg);\n+        limit = x86_segment_limit(&desc);\n \n-        if (segment_expands_down(seg)) {\n+        if (segment_expands_down(desc)) {\n             if (logical_addr_32b >= limit) {\n                 error_report(\"Address exceeds limit (expands down)\");\n                 return -1;\n             }\n \n-            limit = segment_max_limit(seg);\n+            limit = segment_max_limit(desc);\n         }\n \n         if (logical_addr_32b > limit) {\n","prefixes":["PULL","13/19"]}