{"id":2216007,"url":"http://patchwork.ozlabs.org/api/patches/2216007/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325164453.72127-16-pbonzini@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260325164453.72127-16-pbonzini@redhat.com>","list_archive_url":null,"date":"2026-03-25T16:44:49","name":"[PULL,15/19] whpx: i386: fast runtime state reads","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"99d2735d9405552e1a7d9af607c891556520e494","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/?format=json","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325164453.72127-16-pbonzini@redhat.com/mbox/","series":[{"id":497473,"url":"http://patchwork.ozlabs.org/api/series/497473/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497473","date":"2026-03-25T16:44:34","name":"[PULL,01/19] tests/functional: preserve PYTHONPATH entries","version":1,"mbox":"http://patchwork.ozlabs.org/series/497473/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2216007/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2216007/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=bIni7stU;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=google header.b=mfqW6lTQ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgt8C3LvXz1xy3\n\tfor ; Thu, 26 Mar 2026 03:46:03 +1100 (AEDT)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1w5RMM-000565-W4; Wed, 25 Mar 2026 12:45:35 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w5RML-00050m-2N\n for qemu-devel@nongnu.org; Wed, 25 Mar 2026 12:45:33 -0400","from us-smtp-delivery-124.mimecast.com ([170.10.129.124])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w5RMH-0004g8-1A\n for qemu-devel@nongnu.org; Wed, 25 Mar 2026 12:45:31 -0400","from mail-wr1-f71.google.com (mail-wr1-f71.google.com\n [209.85.221.71]) by relay.mimecast.com with ESMTP with STARTTLS\n (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id\n us-mta-99-x8it0dRNNW6rF6HlvQfCHg-1; Wed, 25 Mar 2026 12:45:26 -0400","by mail-wr1-f71.google.com with SMTP id\n ffacd0b85a97d-43b42eee946so1017117f8f.1\n for ; Wed, 25 Mar 2026 09:45:26 -0700 (PDT)","from [192.168.10.48] ([151.49.85.67])\n by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-48711764509sm142682835e9.13.2026.03.25.09.45.21\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 25 Mar 2026 09:45:21 -0700 (PDT)"],"DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1774457128;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=Ta7T0mi+8d9DVcASb2OtQTo0e14u/mzL90h8oJVlsXE=;\n b=bIni7stUK+EOdfY7yi7cHhl3eCCgfiQbuDhXs7YbV/1rfD9n+Km28uzQz6Dpj62gU/nq3H\n wsgUjLUU3rytwCF4suvb4Hq7+4Yll7tlTIqWOThyH56hEiEyqgvTtrjp1uHV55vdomz9ZP\n XB4RDpLtaniJFDfesHfx4tzilp0BwLU=","v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=redhat.com; s=google; t=1774457125; x=1775061925; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=Ta7T0mi+8d9DVcASb2OtQTo0e14u/mzL90h8oJVlsXE=;\n b=mfqW6lTQ4UQ0fYOLJnYu9tD0N4XXetRusAD5d18A3YNfIm390unN/70QLVBtUUe4Cq\n SrgrH8RratF89osCqNk/aJDkc1n6lP90/C+OwPdK+sQI7VjnoxIocXa+NvzuJ1qkwZ70\n d/NxPDZsE1Ayq6Iyw/tU9/C6u1P1AVbXbGzoXviUVMTvPFJRkC1CDZuCNTyAKBiO+jQ9\n W6BCeoVeaascLMkPA4o8cMdWdXU9VDCuDJ7WYz7Mtsl/jhIoejIpPeeDfObwZExJOZm9\n NCQGnk/wcJNnuc6Q0X5dXVU2K9p8DtDOqYLjYpaOFhDMopT6J/BSm2HIuF+aW9LNMVbV\n 3C5w=="],"X-MC-Unique":"x8it0dRNNW6rF6HlvQfCHg-1","X-Mimecast-MFC-AGG-ID":"x8it0dRNNW6rF6HlvQfCHg_1774457126","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1774457125; x=1775061925;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=Ta7T0mi+8d9DVcASb2OtQTo0e14u/mzL90h8oJVlsXE=;\n b=cCFK8zshpUAsC+kZOUrYZNjDLonl5QQgz0/NvY5i8N6y+OjhOVZQ1QHjXLnzdAyJb/\n hg8YUjSgaJrR6M7io+/mim2Nj5OT3DkCgtI6NxOBTZj/x2ob0RfN/U1DZUrTTMr9BOc6\n eGbLHRckUwqP+uWOEw4YL14sS9Hwhk9X+1M4xumAAlgElZ7plHQ6QJ7RVYM4ir2gOPzB\n XX5p0l/81W29JjVGc0CxYrwK+ToKHoXI+DDwPVclLvfNsIUXFQXleYtKUQFxVfv6GkL5\n vQ5BYC+fiCd6nUQ5qvb5dKDDI3p/2YMlc2KzFnpl1y84HVQCPOHc3pHFQWLQU31nCDU6\n FqNA==","X-Gm-Message-State":"AOJu0YxUwp/iLE8RfTyHcRez8Q0O+EwQvdZ4XPrIPKqZMP1djDwOFyTK\n YUVEv1+aAnM2WWhvdTJS9VUDKonkkcVGbdm1se3Ncec/S1c9u5l6xwBC7yd3OI8mmDbvDtRJgLo\n 9pJr3ZDdBkWzwSiW2wWIQXXkg444ZJo5sDdw26946RFXI1foJyoUxPRBvJvRJl4enx0xTZCqUSJ\n O7fHiVcKEq9Ih0CMVGhJe9qYcKaPdEd8mSR/60sjd2","X-Gm-Gg":"ATEYQzxwYaox9WQeW6P+xsEjPq4fES3SieJ9CeKZ1XURmKsotlSjJ2nppxblIoTkORC\n 0BmPWMgn36ErnhKm0dqWTMgmKzlWlNS7I6KqhA/tFlC4c5DMN1hq6y9L19eyBuhAa/3fv53QVBC\n MnaSP+rvqPoYgNg3o/G16zedchuhsydT3D4P77OAGurEtmwyyUxlfBMwjWnaiBQgl1/JFbYoQQt\n /dif46vj8u6D1KgA71ymNzXA6AC2ScmtePmKK2p50E1haROUUxzNGQIrpv01Aw3ebgnua2W/P0H\n Ap3h6cyhpYnzzGSDN5bOLkmyAE1m5pmnLxkJXas6VY8Rz2MBRSI3cKzU7Qyc7RV5Wg3zXPfkFi2\n B2qo//MC+6rlhvampGgepq/kD/P1cQnCYhPodT0DT8A9cYVVng6nUjG0HdBMYWNvqojev6mPRWj\n SYul+q7IG5v8e0Mr+5cc7TYslY","X-Received":["by 2002:a05:600c:8708:b0:486:fe83:861c with SMTP id\n 5b1f17b1804b1-487160241b4mr59526735e9.7.1774457125085;\n Wed, 25 Mar 2026 09:45:25 -0700 (PDT)","by 2002:a05:600c:8708:b0:486:fe83:861c with SMTP id\n 5b1f17b1804b1-487160241b4mr59526435e9.7.1774457124415;\n Wed, 25 Mar 2026 09:45:24 -0700 (PDT)"],"From":"Paolo Bonzini ","To":"qemu-devel@nongnu.org","Cc":"Mohamed Mediouni ","Subject":"[PULL 15/19] whpx: i386: fast runtime state reads","Date":"Wed, 25 Mar 2026 17:44:49 +0100","Message-ID":"<20260325164453.72127-16-pbonzini@redhat.com>","X-Mailer":"git-send-email 2.53.0","In-Reply-To":"<20260325164453.72127-1-pbonzini@redhat.com>","References":"<20260325164453.72127-1-pbonzini@redhat.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=170.10.129.124;\n envelope-from=pbonzini@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Mohamed Mediouni \n\nNow that there's an on-demand interface for fetching CRs\nand segments, only query GPRs and query everything else\non-demand for vmexits.\n\nSigned-off-by: Mohamed Mediouni \nLink: https://lore.kernel.org/r/20260324151323.74473-13-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini \n---\n target/i386/whpx/whpx-all.c | 77 +++++++++++++++++++++++++++++++++----\n 1 file changed, 70 insertions(+), 7 deletions(-)","diff":"diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex 6f232786422..acae61e089d 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -156,6 +156,26 @@ static const WHV_REGISTER_NAME whpx_register_names[] = {\n */\n };\n \n+static const WHV_REGISTER_NAME whpx_register_names_for_vmexit[] = {\n+ /* X64 General purpose registers */\n+ WHvX64RegisterRax,\n+ WHvX64RegisterRcx,\n+ WHvX64RegisterRdx,\n+ WHvX64RegisterRbx,\n+ WHvX64RegisterRsp,\n+ WHvX64RegisterRbp,\n+ WHvX64RegisterRsi,\n+ WHvX64RegisterRdi,\n+ WHvX64RegisterR8,\n+ WHvX64RegisterR9,\n+ WHvX64RegisterR10,\n+ WHvX64RegisterR11,\n+ WHvX64RegisterR12,\n+ WHvX64RegisterR13,\n+ WHvX64RegisterR14,\n+ WHvX64RegisterR15,\n+};\n+\n struct whpx_register_set {\n WHV_REGISTER_VALUE values[RTL_NUMBER_OF(whpx_register_names)];\n };\n@@ -593,6 +613,47 @@ static void whpx_get_xcrs(CPUState *cpu)\n cpu_env(cpu)->xcr0 = xcr0.Reg64;\n }\n \n+static void whpx_get_registers_for_vmexit(CPUState *cpu, WHPXStateLevel level)\n+{\n+ struct whpx_state *whpx = &whpx_global;\n+ AccelCPUState *vcpu = cpu->accel;\n+ X86CPU *x86_cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86_cpu->env;\n+ struct whpx_register_set vcxt;\n+ HRESULT hr;\n+ int idx;\n+ int idx_next;\n+\n+ assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));\n+\n+ hr = whp_dispatch.WHvGetVirtualProcessorRegisters(\n+ whpx->partition, cpu->cpu_index,\n+ whpx_register_names_for_vmexit,\n+ RTL_NUMBER_OF(whpx_register_names_for_vmexit),\n+ &vcxt.values[0]);\n+ if (FAILED(hr)) {\n+ error_report(\"WHPX: Failed to get virtual processor context, hr=%08lx\",\n+ hr);\n+ }\n+\n+ idx = 0;\n+\n+ /* Indexes for first 16 registers match between HV and QEMU definitions */\n+ idx_next = 16;\n+ for (idx = 0; idx < CPU_NB_REGS; idx += 1) {\n+ env->regs[idx] = vcxt.values[idx].Reg64;\n+ }\n+ idx = idx_next;\n+\n+ env->eip = vcpu->exit_ctx.VpContext.Rip;\n+ env->eflags = vcpu->exit_ctx.VpContext.Rflags;\n+ rflags_to_lflags(env);\n+\n+ assert(idx == RTL_NUMBER_OF(whpx_register_names_for_vmexit));\n+\n+ x86_update_hflags(env);\n+}\n+\n void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)\n {\n struct whpx_state *whpx = &whpx_global;\n@@ -608,7 +669,11 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)\n \n assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));\n \n- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && !env->tsc_valid) {\n+ if (level == WHPX_LEVEL_FAST_RUNTIME_STATE) {\n+ return whpx_get_registers_for_vmexit(cpu, level);\n+ }\n+\n+ if (!env->tsc_valid) {\n whpx_get_tsc(cpu);\n env->tsc_valid = !runstate_is_running();\n }\n@@ -623,7 +688,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)\n hr);\n }\n \n- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && whpx_irqchip_in_kernel()) {\n+ if (whpx_irqchip_in_kernel()) {\n /*\n * Fetch the TPR value from the emulated APIC. It may get overwritten\n * below with the value from CR8 returned by\n@@ -680,7 +745,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)\n env->cr[4] = vcxt.values[idx++].Reg64;\n assert(whpx_register_names[idx] == WHvX64RegisterCr8);\n tpr = vcxt.values[idx++].Reg64;\n- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && tpr != vcpu->tpr) {\n+ if (tpr != vcpu->tpr) {\n vcpu->tpr = tpr;\n cpu_set_apic_tpr(x86_cpu->apic_state, whpx_cr8_to_apic_tpr(tpr));\n }\n@@ -691,9 +756,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)\n * Extended control registers needs to be handled separately depending\n * on whether xsave is supported/enabled or not.\n */\n- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE) {\n- whpx_get_xcrs(cpu);\n- }\n+ whpx_get_xcrs(cpu);\n \n /* 16 XMM registers */\n assert(whpx_register_names[idx] == WHvX64RegisterXmm0);\n@@ -768,7 +831,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)\n \n assert(idx == RTL_NUMBER_OF(whpx_register_names));\n \n- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && whpx_irqchip_in_kernel()) {\n+ if (whpx_irqchip_in_kernel()) {\n whpx_apic_get(x86_cpu->apic_state);\n }\n \n","prefixes":["PULL","15/19"]}