{"id":2215872,"url":"http://patchwork.ozlabs.org/api/patches/2215872/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325134932.765163-1-mjt@tls.msk.ru/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260325134932.765163-1-mjt@tls.msk.ru>","list_archive_url":null,"date":"2026-03-25T13:49:26","name":"[trivial] util/meson.build: do not add cpuinfo-$arch to util_ss for 32bit CPUs","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"c7b6de7c97392780d1097d35629d4c736e44ba29","submitter":{"id":183,"url":"http://patchwork.ozlabs.org/api/people/183/?format=json","name":"Michael Tokarev","email":"mjt@tls.msk.ru"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325134932.765163-1-mjt@tls.msk.ru/mbox/","series":[{"id":497447,"url":"http://patchwork.ozlabs.org/api/series/497447/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497447","date":"2026-03-25T13:49:26","name":"[trivial] util/meson.build: do not add cpuinfo-$arch to util_ss for 32bit CPUs","version":1,"mbox":"http://patchwork.ozlabs.org/series/497447/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2215872/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2215872/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=tls.msk.ru header.i=@tls.msk.ru header.a=rsa-sha256\n header.s=202602 header.b=X9kyfpRv;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgpFn5DxQz1xy1\n\tfor ; Thu, 26 Mar 2026 00:50:36 +1100 (AEDT)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1w5OcO-0000Gn-NX; Wed, 25 Mar 2026 09:49:57 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w5OcH-0000EI-5q; Wed, 25 Mar 2026 09:49:50 -0400","from isrv.corpit.ru ([212.248.84.144])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w5OcE-0004fH-54; Wed, 25 Mar 2026 09:49:48 -0400","from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2])\n by isrv.corpit.ru (Postfix) with ESMTP id 4D2AE197919;\n Wed, 25 Mar 2026 16:49:12 +0300 (MSK)","from think4mjt.tls.msk.ru (mjtthink.wg.tls.msk.ru [192.168.177.146])\n by tsrv.corpit.ru (Postfix) with ESMTP id E8785386E0A;\n Wed, 25 Mar 2026 16:49:32 +0300 (MSK)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=tls.msk.ru; s=202602;\n t=1774446552; bh=w/yW2JdOaTA242sD9GEvdWS8QtuOnxXKd8VVkS4H3RY=;\n h=From:To:Cc:Subject:Date;\n b=X9kyfpRvcFXOD3PcKP/1SpdhyOXVEHEKJBILd0zSH/8mCBE6hRFbWoQWHXIitRWFA\n ttlCNU5jkIIU5nHs5Nb4E+5iQPsknzn1CLd4IvPohryqy9NYpyrPIf9wAP08x5+Shf\n 1mdTQbasG1EoXfqK5vOTMNJlRxF5VJPWbdYf//IRmjEPijM9fpG+v9HrYo/KYk200p\n c5DY42L6br51Xl9ZCvF7QlUgT6WBnKzrh0ouSnjIop5+YT7Utotz8SLExw91dnzghD\n uznrHcWlHqrzmUDQtSJOTqoKKzBhRxwSVr5xwEz8qZXbvGes/lJ00iABOB73AEH4nx\n sn5Xf9Py9ayLA==","From":"Michael Tokarev ","To":"qemu-devel@nongnu.org,\n\tqemu-trivial@nongnu.org","Cc":"Michael Tokarev , Paolo Bonzini ,\n\t=?utf-8?q?Marc-Andr=C3=A9_Lureau?= ,\n\t=?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , =?utf-8?q?Phil?=\n\t=?utf-8?q?ippe_Mathieu-Daud=C3=A9?= ","Subject":"[PATCH trivial] util/meson.build: do not add cpuinfo-$arch to util_ss\n for 32bit CPUs","Date":"Wed, 25 Mar 2026 16:49:26 +0300","Message-ID":"<20260325134932.765163-1-mjt@tls.msk.ru>","X-Mailer":"git-send-email 2.47.3","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=212.248.84.144; envelope-from=mjt@tls.msk.ru;\n helo=isrv.corpit.ru","X-Spam_score_int":"-19","X-Spam_score":"-2.0","X-Spam_bar":"--","X-Spam_report":"(-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"qemu dropped support for 32bit CPUs recently, so this change is an\nadditional clean-up on top. But in theory it will allow building\nqemu-guest-agent on a 32bit system.\n\nSigned-off-by: Michael Tokarev \n---\n util/meson.build | 6 +++---\n 1 file changed, 3 insertions(+), 3 deletions(-)","diff":"diff --git a/util/meson.build b/util/meson.build\nindex 33132c04ad..170e959d9b 100644\n--- a/util/meson.build\n+++ b/util/meson.build\n@@ -116,13 +116,13 @@ endif\n \n if cpu == 'aarch64'\n util_ss.add(files('cpuinfo-aarch64.c'))\n-elif cpu in ['x86', 'x86_64']\n+elif cpu == 'x86_64'\n util_ss.add(files('cpuinfo-i386.c'))\n elif cpu == 'loongarch64'\n util_ss.add(files('cpuinfo-loongarch.c'))\n-elif cpu in ['ppc', 'ppc64']\n+elif cpu == 'ppc64'\n util_ss.add(files('cpuinfo-ppc.c'))\n-elif cpu in ['riscv32', 'riscv64']\n+elif cpu = 'riscv64'\n util_ss.add(files('cpuinfo-riscv.c'))\n elif cpu == 's390x'\n util_ss.add(files('s390x_pci_mmio.c'))\n","prefixes":["trivial"]}