{"id":2215831,"url":"http://patchwork.ozlabs.org/api/patches/2215831/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325120944.29391-2-thuth@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260325120944.29391-2-thuth@redhat.com>","list_archive_url":null,"date":"2026-03-25T12:09:43","name":"[1/2] target/i386/tcg/sysemu: Move target specific SMM code to separate functions","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"17d8971fde056814594b16fbe3fd3312716277ff","submitter":{"id":66152,"url":"http://patchwork.ozlabs.org/api/people/66152/?format=json","name":"Thomas Huth","email":"thuth@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325120944.29391-2-thuth@redhat.com/mbox/","series":[{"id":497430,"url":"http://patchwork.ozlabs.org/api/series/497430/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497430","date":"2026-03-25T12:09:42","name":"target/i386: Allow 32-bit SMM code to be used in the 64-bit binary","version":1,"mbox":"http://patchwork.ozlabs.org/series/497430/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2215831/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2215831/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=Mbwaa65G;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1774440593;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=U2SkktuFniNpBHFMckJQz4idYM3YsD8QVsvB/+MsLBM=;\n b=Mbwaa65GSRkGe9uHVEaz/3KPTHSGl6mUzKILXIZwdDPK2fijkdVBoKOiWbZuiSf9hK/Yrg\n hyEAwv+Tq1pYRsbcKZKu+YCvp705d/VmFabT/sq0u5CHQOwTsD2WDwiuC2nIno0Nk9w6eS\n sgNmTdmro0litLhF5m+bh3f2nTwzF4Y=","X-MC-Unique":"xbaq4GiuMR-0xvz9je7mow-1","X-Mimecast-MFC-AGG-ID":"xbaq4GiuMR-0xvz9je7mow_1774440591","From":"Thomas Huth ","To":"Paolo Bonzini ,\n\tqemu-devel@nongnu.org","Cc":"Richard Henderson , =?utf-8?q?Philippe_Mat?=\n\t=?utf-8?q?hieu-Daud=C3=A9?= ,\n Pierrick Bouvier ","Subject":"[PATCH 1/2] target/i386/tcg/sysemu: Move target specific SMM code to\n separate functions","Date":"Wed, 25 Mar 2026 13:09:43 +0100","Message-ID":"<20260325120944.29391-2-thuth@redhat.com>","In-Reply-To":"<20260325120944.29391-1-thuth@redhat.com>","References":"<20260325120944.29391-1-thuth@redhat.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Scanned-By":"MIMEDefang 3.0 on 10.30.177.12","Received-SPF":"pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"12","X-Spam_score":"1.2","X-Spam_bar":"+","X-Spam_report":"(1.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001,\n RCVD_IN_SBL_CSS=3.335, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Thomas Huth \n\nThis code movement will make the next patch easier to read.\n\nSigned-off-by: Thomas Huth \n---\n target/i386/tcg/system/smm_helper.c | 47 ++++++++++++++++++-----------\n 1 file changed, 30 insertions(+), 17 deletions(-)","diff":"diff --git a/target/i386/tcg/system/smm_helper.c b/target/i386/tcg/system/smm_helper.c\nindex fb028a8272f..3be78cd53d3 100644\n--- a/target/i386/tcg/system/smm_helper.c\n+++ b/target/i386/tcg/system/smm_helper.c\n@@ -32,26 +32,13 @@\n #define SMM_REVISION_ID 0x00020000\n #endif\n \n-void do_smm_enter(X86CPU *cpu)\n+static void sm_state_init(X86CPU *cpu)\n {\n CPUX86State *env = &cpu->env;\n CPUState *cs = CPU(cpu);\n- target_ulong sm_state;\n SegmentCache *dt;\n int i, offset;\n-\n- qemu_log_mask(CPU_LOG_INT, \"SMM: enter\\n\");\n- log_cpu_state_mask(CPU_LOG_INT, CPU(cpu), CPU_DUMP_CCOP);\n-\n- env->msr_smi_count++;\n- env->hflags |= HF_SMM_MASK;\n- if (env->hflags2 & HF2_NMI_MASK) {\n- env->hflags2 |= HF2_SMM_INSIDE_NMI_MASK;\n- } else {\n- env->hflags2 |= HF2_NMI_MASK;\n- }\n-\n- sm_state = env->smbase + 0x8000;\n+ target_ulong sm_state = env->smbase + 0x8000;\n \n #ifdef TARGET_X86_64\n for (i = 0; i < 6; i++) {\n@@ -156,6 +143,25 @@ void do_smm_enter(X86CPU *cpu)\n x86_stl_phys(cs, sm_state + 0x7efc, SMM_REVISION_ID);\n x86_stl_phys(cs, sm_state + 0x7ef8, env->smbase);\n #endif\n+}\n+\n+void do_smm_enter(X86CPU *cpu)\n+{\n+ CPUX86State *env = &cpu->env;\n+\n+ qemu_log_mask(CPU_LOG_INT, \"SMM: enter\\n\");\n+ log_cpu_state_mask(CPU_LOG_INT, CPU(cpu), CPU_DUMP_CCOP);\n+\n+ env->msr_smi_count++;\n+ env->hflags |= HF_SMM_MASK;\n+ if (env->hflags2 & HF2_NMI_MASK) {\n+ env->hflags2 |= HF2_SMM_INSIDE_NMI_MASK;\n+ } else {\n+ env->hflags2 |= HF2_NMI_MASK;\n+ }\n+\n+ sm_state_init(cpu);\n+\n /* init SMM cpu state */\n \n #ifdef TARGET_X86_64\n@@ -191,9 +197,8 @@ void do_smm_enter(X86CPU *cpu)\n DESC_G_MASK | DESC_A_MASK);\n }\n \n-void helper_rsm(CPUX86State *env)\n+static void rsm_load_regs(CPUX86State *env)\n {\n- X86CPU *cpu = env_archcpu(env);\n CPUState *cs = env_cpu(env);\n target_ulong sm_state;\n int i, offset;\n@@ -308,6 +313,14 @@ void helper_rsm(CPUX86State *env)\n env->smbase = x86_ldl_phys(cs, sm_state + 0x7ef8);\n }\n #endif\n+}\n+\n+void helper_rsm(CPUX86State *env)\n+{\n+ X86CPU *cpu = env_archcpu(env);\n+\n+ rsm_load_regs(env);\n+\n if ((env->hflags2 & HF2_SMM_INSIDE_NMI_MASK) == 0) {\n env->hflags2 &= ~HF2_NMI_MASK;\n }\n","prefixes":["1/2"]}