{"id":2215776,"url":"http://patchwork.ozlabs.org/api/patches/2215776/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260325101437.3059693-4-sheetal@nvidia.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260325101437.3059693-4-sheetal@nvidia.com>","list_archive_url":null,"date":"2026-03-25T10:14:26","name":"[v3,03/14] ASoC: tegra: Add error logging in tegra210_admaif driver","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b82e7952993579693af4eeaa1643f2501c70dde9","submitter":{"id":87986,"url":"http://patchwork.ozlabs.org/api/people/87986/?format=json","name":"Sheetal","email":"sheetal@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260325101437.3059693-4-sheetal@nvidia.com/mbox/","series":[{"id":497410,"url":"http://patchwork.ozlabs.org/api/series/497410/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=497410","date":"2026-03-25T10:14:23","name":"ASoC: tegra: Add error logging for probe and callback failures","version":3,"mbox":"http://patchwork.ozlabs.org/series/497410/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2215776/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2215776/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-tegra+bounces-13185-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=YNsXCFD3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-tegra+bounces-13185-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=\"YNsXCFD3\"","smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=52.101.193.30","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com","smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=nvidia.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgjcp1Fbcz1yG1\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 25 Mar 2026 21:21:46 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 3F52F30C9C47\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 25 Mar 2026 10:15:39 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 1E3D83988E6;\n\tWed, 25 Mar 2026 10:15:39 +0000 (UTC)","from CH1PR05CU001.outbound.protection.outlook.com\n (mail-northcentralusazon11010030.outbound.protection.outlook.com\n [52.101.193.30])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 69EC139478D;\n\tWed, 25 Mar 2026 10:15:37 +0000 (UTC)","from CH5P222CA0007.NAMP222.PROD.OUTLOOK.COM (2603:10b6:610:1ee::19)\n by MN0PR12MB6029.namprd12.prod.outlook.com (2603:10b6:208:3cf::21) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9745.20; Wed, 25 Mar\n 2026 10:15:32 +0000","from CH1PEPF0000AD7C.namprd04.prod.outlook.com\n (2603:10b6:610:1ee:cafe::40) by CH5P222CA0007.outlook.office365.com\n (2603:10b6:610:1ee::19) with Microsoft SMTP Server (version=TLS1_3,\n cipher=TLS_AES_256_GCM_SHA384) id 15.20.9723.32 via Frontend Transport; Wed,\n 25 Mar 2026 10:15:29 +0000","from mail.nvidia.com (216.228.118.232) by\n CH1PEPF0000AD7C.mail.protection.outlook.com (10.167.244.84) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.9745.21 via Frontend Transport; Wed, 25 Mar 2026 10:15:32 +0000","from drhqmail202.nvidia.com (10.126.190.181) by mail.nvidia.com\n (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 25 Mar\n 2026 03:15:19 -0700","from drhqmail202.nvidia.com (10.126.190.181) by\n drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.2562.20; Wed, 25 Mar 2026 03:15:19 -0700","from build-sheetal-bionic-20251202.nvidia.com (10.127.8.14) by\n mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server id 15.2.2562.20\n via Frontend Transport; Wed, 25 Mar 2026 03:15:18 -0700"],"ARC-Seal":["i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774433738; cv=fail;\n b=BxQDBunVtKFRr+PWz77mnTsxtqFJsCc5y7njqfy2hd+acaPE+Zl8EI6VyVffnIH6RNK1d7xY9fckkJbzVIvKdiW7ilybzKo5mdwf3bVGjNLRJdllDE/QqH+ayYx+luaJUF5P2ef/l1ym+7kxU55yvYMf3+APPjMf5NLvab/zzaQ=","i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=a+k+qgLsQYuQDX5U/eZqSwFOSAeaV7eRY0VKtIHE283gTbGeD4xjiTQozVYvZ6CA8V3nF6ZFyMUtWJEMg9INmzOJIKsdxzWodXCCq6B7y2a5eEDorWpPI4S2bjbCCYNUwy30aucCP+g4BLwn8Mi7g0V2SoIVIePf3vNrN7pgsO+n1Vr0SW7A/abCnopWFtnifFcMUBnUbf6amv7oGsQrgflyqobuKVnSNgdiyK/Fkyc4ROa7SnNbcn8lF6WMqXCm/+Us20LltBtgrdRYum9/VXkX0AWmDbClnvDKjEZ5RVp41nLIMpMzeY0R3Za8Qh8SWW6HCI/+PuoPdzNOBqRpVg=="],"ARC-Message-Signature":["i=2; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774433738; c=relaxed/simple;\n\tbh=E8jyob7/BmIoE0KzitN0m3vSwaA75FsbNAvnqIQfaPY=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=sNG3Kg4VAJ7rdYFwyamFWW5mFIeZN0Wy/dO1Km4jGEk2KLRbwN7fHdij1/wpdkic/eHpcD0Lkn5z9MyDzx0I+ESIC9QAQLyG309xZh40w2Je7zosg64vjlY7o2a5O1N50kyN4GkpvoZrWwhdYBhwaWVmGBwI0wyFShlhaS904aU=","i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=wY+pg8ITt1QLSU/LkSJUBTvsiNR3xABqHdrsHnuZCVs=;\n b=jsfx4YYDiFf92VaU38qlCJ7lEJa/f8BOEo4rIt1DbRvXw52rzvY/Uyq1YsxLnvpt4acONpT9xU25ORGQRgvXiiUnG2Y7sd3388YzV6ujJ2fOVRZ/w+MH179IcBDLLWVbwllDeWki2jhWrHK02wKH8WM05g1nQwT3maETsKnaPeoS8tDXysSMn4ekSgcLmOh1zEfOgED6nye80s847OA5DbpYuTdStssjr0S4JaMjKgnCRHB2Cll0IGltqMA5JgcOmbbK1WpV7AjHoDHkTKt2TnnBHKPvr3CnRAVCvfPOvGYbvJGvgeclx8HtCCL9FaY3ur6Me6thqT5YIYPyD2/aJQ=="],"ARC-Authentication-Results":["i=2; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com;\n spf=fail smtp.mailfrom=nvidia.com;\n dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=YNsXCFD3; arc=fail smtp.client-ip=52.101.193.30","i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.118.232) smtp.rcpttodomain=gmail.com smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none (0)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=wY+pg8ITt1QLSU/LkSJUBTvsiNR3xABqHdrsHnuZCVs=;\n b=YNsXCFD3jthXf6it4j+Hp4gNXng1bFQMykD7KBJ4pt7SFc5/CYNfTaJ6R9vc2BcF7ExSqT2PtToxr0G15FEZI7P59/kM1s/LLpaVxCqlDq4Oi0iNT2m+uHh0Ar9rVw/0vdZU7F5+XB6OIzTNukDv3qC6sQiKG70YAqEHNrCa1wUHzA7hroPTqgP8n1irSNvopPvPcvldLdN3n5W7k8TFYWTSPkeEjzh1BJuzJlNK03IHu6iOceDik6Huu1VFwDJKzR50flFpI5abYh3TmhsGsTJ4HSBuLEKd/0WJBQHBrR3NDbDI8sI7dSQWQs2Dd8xmHg42Hzskrq/cDUiKTeVDkA==","X-MS-Exchange-Authentication-Results":"spf=pass (sender IP is 216.228.118.232)\n smtp.mailfrom=nvidia.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;","Received-SPF":"Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.118.232 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C","From":"Sheetal <sheetal@nvidia.com>","To":"Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>,\n\tThierry Reding <thierry.reding@kernel.org>, Jonathan Hunter\n\t<jonathanh@nvidia.com>","CC":"Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>, \"Mohan\n Kumar\" <mkumard@nvidia.com>, Kuninori Morimoto\n\t<kuninori.morimoto.gx@renesas.com>, <linux-sound@vger.kernel.org>,\n\t<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Sheetal\n\t<sheetal@nvidia.com>","Subject":"[PATCH v3 03/14] ASoC: tegra: Add error logging in tegra210_admaif\n driver","Date":"Wed, 25 Mar 2026 10:14:26 +0000","Message-ID":"<20260325101437.3059693-4-sheetal@nvidia.com>","X-Mailer":"git-send-email 2.17.1","In-Reply-To":"<20260325101437.3059693-1-sheetal@nvidia.com>","References":"<20260325101437.3059693-1-sheetal@nvidia.com>","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"<linux-tegra.vger.kernel.org>","List-Subscribe":"<mailto:linux-tegra+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-tegra+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Type":"text/plain","X-NV-OnPremToCloud":"ExternallySecured","X-EOPAttributedMessage":"0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"CH1PEPF0000AD7C:EE_|MN0PR12MB6029:EE_","X-MS-Office365-Filtering-Correlation-Id":"2473b67e-c472-4853-e918-08de8a57729a","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"\n\tBCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|22082099003|18002099003|56012099003;","X-Microsoft-Antispam-Message-Info":"\n\t525cd3Eca5cXJYgYkCDYHT5gYns0qyE87ZKTG7zQvJCvWuq69gKS8RGlOHvyj7tyJY7CJHSTcU4R/L+65uw5shfG2AjKsxko7M/miGuMRjGHRzALveRSfk9SM5cofuOMj3oFdXRABaFEDQ+Nc6P+MJHSYibpKsEGLNkfuBcDE72GSdcTrUPJ5Qa4vYG9KzEZN6k6AkCMzzRcqedo+xF2gOJi2MUA2s6fHcZqVXc/LktOtMtXDcNgG77zuHTrmTx3IDOPSNeHQgQ36Q69mUk4+8juJaMHM35swkiE4L7pCzOLknEviXzCZ4Dnj3lp3rYjRvW75IjFzkS4KrwuxcZ0GnOlelr3nNLym2Di6823I9GmnEifLz+Wl6xpJOCqHvFbAX9lRujvWOmL4UBicYrDXaw9LCYI9QkxNXQj24fppIB8s3Ob1N/DJiUsuM+T4hKx/rwOvSIIq/4+DGdJt0NRNGV+uaw86og9XceTFwo+DuLFRU4fyNivDoIQQlJUhppOtSKS4pHGUHPGS75VyBjM0mwmGdMdANHRqU2nFyvJwzegX2eeqHTiwtLxpfn/RvuXfjFCUqnCuVtf6ROHhSX8KjkrES+i5R9lJ9fibN74V4uPXWwvhaaX6b0LoJfqM1dkxzuzahaH2zaoKdeHpL7AfnNtC+y1AYSuvOahWQmzBDyNLayohzeoTJnUMD+CUDzXQYPoTXc3NvlNlAXGS512wZXZRp/hxtCsMEa/Dmyi1tvMmOx3LCsWDakhVdGiz5BK/RFpQLIByWZioMDfzlGYBg==","X-Forefront-Antispam-Report":"\n\tCIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700016)(376014)(22082099003)(18002099003)(56012099003);DIR:OUT;SFP:1101;","X-MS-Exchange-AntiSpam-MessageData-ChunkCount":"1","X-MS-Exchange-AntiSpam-MessageData-0":"\n\tHhz4ccW6cdJNO8y9BtDlQSws7z3/S2b00ELMtNqzSS144zu1nJuwFo7KS1Z/2Ub/QPuD6dlynrkChYMz4VZ4UPysNkz+sRmICYyJwpd2a7Et/T2E8uj/EOHwNSnv7YxaXxgil7McWfymlOIO0o4IG7PawpBXqSJ27kqL6cYKoQh4seDx7knf3xGuStupxZmdQZqhb6ghtUD5d3TNdufePW5QJ7Ho9aWGZlhRR28FCHLKEmsyE0sTd3tgF/JZeARMP7U6KL+uvdIiF/BFc0RQv9FVOKHkk0qU8m8I5HRm2BilFEcNOCeUxeg53fydMEKnxqBfhIuMFGqi26/8gEbY1Ny9GMYAASDo/z0r+XAQNHtzYTeA4Xrkj47Wj5CLNeKMIWi62E84s/tU8Yd3BOpBU6H3t/8t6IMdVOE9Xfhweod1F4AiNR2G0/KwHZXO9fkq","X-OriginatorOrg":"Nvidia.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"25 Mar 2026 10:15:32.1101\n (UTC)","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 2473b67e-c472-4853-e918-08de8a57729a","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n\tCH1PEPF0000AD7C.namprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"MN0PR12MB6029"},"content":"Log errors in the Tegra210 ADMAIF probe and runtime callback paths.\n\nSigned-off-by: Sheetal <sheetal@nvidia.com>\n---\n sound/soc/tegra/tegra210_admaif.c | 18 ++++++++++--------\n 1 file changed, 10 insertions(+), 8 deletions(-)","diff":"diff --git a/sound/soc/tegra/tegra210_admaif.c b/sound/soc/tegra/tegra210_admaif.c\nindex 0976779d29f2..5d690a2f8509 100644\n--- a/sound/soc/tegra/tegra210_admaif.c\n+++ b/sound/soc/tegra/tegra210_admaif.c\n@@ -408,6 +408,7 @@ static int tegra_admaif_start(struct snd_soc_dai *dai, int direction)\n \t\treg = CH_RX_REG(TEGRA_ADMAIF_RX_ENABLE, dai->id);\n \t\tbreak;\n \tdefault:\n+\t\tdev_err(dai->dev, \"invalid stream direction: %d\\n\", direction);\n \t\treturn -EINVAL;\n \t}\n \n@@ -441,6 +442,7 @@ static int tegra_admaif_stop(struct snd_soc_dai *dai, int direction)\n \t\treset_reg = CH_RX_REG(TEGRA_ADMAIF_RX_SOFT_RESET, dai->id);\n \t\tbreak;\n \tdefault:\n+\t\tdev_err(dai->dev, \"invalid stream direction: %d\\n\", direction);\n \t\treturn -EINVAL;\n \t}\n \n@@ -489,6 +491,7 @@ static int tegra_admaif_trigger(struct snd_pcm_substream *substream, int cmd,\n \tcase SNDRV_PCM_TRIGGER_SUSPEND:\n \t\treturn tegra_admaif_stop(dai, substream->stream);\n \tdefault:\n+\t\tdev_err(dai->dev, \"invalid trigger command: %d\\n\", cmd);\n \t\treturn -EINVAL;\n \t}\n }\n@@ -966,10 +969,9 @@ static int tegra_admaif_probe(struct platform_device *pdev)\n \tregcache_cache_only(admaif->regmap, true);\n \n \terr = tegra_isomgr_adma_register(&pdev->dev);\n-\tif (err) {\n-\t\tdev_err(&pdev->dev, \"Failed to add interconnect path\\n\");\n-\t\treturn err;\n-\t}\n+\tif (err)\n+\t\treturn dev_err_probe(&pdev->dev, err,\n+\t\t\t\t     \"failed to add interconnect path\\n\");\n \n \tregmap_update_bits(admaif->regmap, admaif->soc_data->global_base +\n \t\t\t   TEGRA_ADMAIF_GLOBAL_ENABLE, 1, 1);\n@@ -1009,11 +1011,9 @@ static int tegra_admaif_probe(struct platform_device *pdev)\n \t\t\t\t\t      admaif->soc_data->cmpnt,\n \t\t\t\t\t      admaif->soc_data->dais,\n \t\t\t\t\t      admaif->soc_data->num_ch);\n-\tif (err) {\n-\t\tdev_err(&pdev->dev,\n-\t\t\t\"can't register ADMAIF component, err: %d\\n\", err);\n-\t\treturn err;\n-\t}\n+\tif (err)\n+\t\treturn dev_err_probe(&pdev->dev, err,\n+\t\t\t\t     \"can't register ADMAIF component\\n\");\n \n \tpm_runtime_enable(&pdev->dev);\n \n","prefixes":["v3","03/14"]}