{"id":2215746,"url":"http://patchwork.ozlabs.org/api/patches/2215746/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260325093118.684142-1-fra.schnyder@gmail.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260325093118.684142-1-fra.schnyder@gmail.com>","list_archive_url":null,"date":"2026-03-25T09:31:16","name":"[v1] PCI: imx6: Fix reference clock source selection","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d5b9a0afcff4353bea4619b31cdb5d576ed33172","submitter":{"id":92056,"url":"http://patchwork.ozlabs.org/api/people/92056/?format=json","name":"Franz Schnyder","email":"fra.schnyder@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260325093118.684142-1-fra.schnyder@gmail.com/mbox/","series":[{"id":497403,"url":"http://patchwork.ozlabs.org/api/series/497403/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=497403","date":"2026-03-25T09:31:16","name":"[v1] PCI: imx6: Fix reference clock source selection","version":1,"mbox":"http://patchwork.ozlabs.org/series/497403/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2215746/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2215746/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-pci+bounces-51033-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=hckSUcy8;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-51033-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"hckSUcy8\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.128.43","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fghgR5s8Xz1xy1\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 25 Mar 2026 20:38:59 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id DA692300878F\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 25 Mar 2026 09:32:07 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 4237F34A77D;\n\tWed, 25 Mar 2026 09:32:07 +0000 (UTC)","from mail-wm1-f43.google.com (mail-wm1-f43.google.com\n [209.85.128.43])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id D3DA8350A1F\n\tfor <linux-pci@vger.kernel.org>; Wed, 25 Mar 2026 09:32:05 +0000 (UTC)","by mail-wm1-f43.google.com with SMTP id\n 5b1f17b1804b1-48702d51cd0so49231895e9.2\n        for <linux-pci@vger.kernel.org>; Wed, 25 Mar 2026 02:32:05 -0700 (PDT)","from franzs-nb.corp.toradex.com\n (248.201.173.83.static.wline.lns.sme.cust.swisscom.ch. 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This currently\nbreaks functionality if the internal refclk is used.\n\nPass always IMX95_PCIE_REF_USE_PAD as the mask and clear the bit if\nexternal refclk is not used.\n\nFixes: d8574ce57d76 (\"PCI: imx6: Add external reference clock input mode support\")\nCc: stable@vger.kernel.org\nSigned-off-by: Franz Schnyder <franz.schnyder@toradex.com>\n---\n drivers/pci/controller/dwc/pci-imx6.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c\nindex 81a7093494c8..e0580d6efa57 100644\n--- a/drivers/pci/controller/dwc/pci-imx6.c\n+++ b/drivers/pci/controller/dwc/pci-imx6.c\n@@ -268,8 +268,8 @@ static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie)\n \t\t\tIMX95_PCIE_PHY_CR_PARA_SEL);\n \n \tregmap_update_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_PHY_GEN_CTRL,\n-\t\t\t   ext ? IMX95_PCIE_REF_USE_PAD : 0,\n-\t\t\t   IMX95_PCIE_REF_USE_PAD);\n+\t\t\t   IMX95_PCIE_REF_USE_PAD,\n+\t\t\t   ext ? IMX95_PCIE_REF_USE_PAD : 0);\n \tregmap_update_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_SS_RW_REG_0,\n \t\t\t   IMX95_PCIE_REF_CLKEN,\n \t\t\t   ext ? 0 : IMX95_PCIE_REF_CLKEN);\n","prefixes":["v1"]}