{"id":2187622,"url":"http://patchwork.ozlabs.org/api/patches/2187622/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260122111639.32346-7-philmd@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260122111639.32346-7-philmd@linaro.org>","list_archive_url":null,"date":"2026-01-22T11:16:39","name":"[PULL,v2,06/37] target/ppc: Simplify endianness handling in Altivec opcodes","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"531f740e10953e8321b8cdae7a354ec4788bae22","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260122111639.32346-7-philmd@linaro.org/mbox/","series":[{"id":489357,"url":"http://patchwork.ozlabs.org/api/series/489357/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=489357","date":"2026-01-22T11:16:33","name":"[PULL,v2,01/37] target/i386: Use little-endian variant of cpu_ld/st_data*()","version":2,"mbox":"http://patchwork.ozlabs.org/series/489357/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2187622/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2187622/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=vyjqFWOL;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::336;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Access the memory in big-endian order,\nswap bytes when MSR.LE is set.\n\nSigned-off-by: Philippe Mathieu-Daudé \nReviewed-by: Richard Henderson \nMessage-Id: <20251126202200.23100-22-philmd@linaro.org>\n---\n target/ppc/mem_helper.c | 31 ++++++++++---------------------\n 1 file changed, 10 insertions(+), 21 deletions(-)","diff":"diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c\nindex 6ab71a6fcb4..7318b02c46a 100644\n--- a/target/ppc/mem_helper.c\n+++ b/target/ppc/mem_helper.c\n@@ -31,15 +31,6 @@\n \n /* #define DEBUG_OP */\n \n-static inline bool needs_byteswap(const CPUPPCState *env)\n-{\n-#if TARGET_BIG_ENDIAN\n- return FIELD_EX64(env->msr, MSR, LE);\n-#else\n- return !FIELD_EX64(env->msr, MSR, LE);\n-#endif\n-}\n-\n /*****************************************************************************/\n /* Memory load and stores */\n \n@@ -401,11 +392,10 @@ target_ulong helper_lscbx(CPUPPCState *env, target_ulong addr, uint32_t reg,\n int adjust = HI_IDX * (n_elems - 1); \\\n int sh = sizeof(r->element[0]) >> 1; \\\n int index = (addr & 0xf) >> sh; \\\n- if (FIELD_EX64(env->msr, MSR, LE)) { \\\n- index = n_elems - index - 1; \\\n- } \\\n+ bool byteswap = FIELD_EX64(env->msr, MSR, LE); \\\n \\\n- if (needs_byteswap(env)) { \\\n+ if (byteswap) { \\\n+ index = n_elems - index - 1; \\\n r->element[LO_IDX ? index : (adjust - index)] = \\\n swap(access(env, addr, GETPC())); \\\n } else { \\\n@@ -415,8 +405,8 @@ target_ulong helper_lscbx(CPUPPCState *env, target_ulong addr, uint32_t reg,\n }\n #define I(x) (x)\n LVE(LVEBX, cpu_ldub_data_ra, I, u8)\n-LVE(LVEHX, cpu_lduw_data_ra, bswap16, u16)\n-LVE(LVEWX, cpu_ldl_data_ra, bswap32, u32)\n+LVE(LVEHX, cpu_lduw_be_data_ra, bswap16, u16)\n+LVE(LVEWX, cpu_ldl_be_data_ra, bswap32, u32)\n #undef I\n #undef LVE\n \n@@ -428,11 +418,10 @@ LVE(LVEWX, cpu_ldl_data_ra, bswap32, u32)\n int adjust = HI_IDX * (n_elems - 1); \\\n int sh = sizeof(r->element[0]) >> 1; \\\n int index = (addr & 0xf) >> sh; \\\n- if (FIELD_EX64(env->msr, MSR, LE)) { \\\n- index = n_elems - index - 1; \\\n- } \\\n+ bool byteswap = FIELD_EX64(env->msr, MSR, LE); \\\n \\\n- if (needs_byteswap(env)) { \\\n+ if (byteswap) { \\\n+ index = n_elems - index - 1; \\\n access(env, addr, swap(r->element[LO_IDX ? index : \\\n (adjust - index)]), \\\n GETPC()); \\\n@@ -443,8 +432,8 @@ LVE(LVEWX, cpu_ldl_data_ra, bswap32, u32)\n }\n #define I(x) (x)\n STVE(STVEBX, cpu_stb_data_ra, I, u8)\n-STVE(STVEHX, cpu_stw_data_ra, bswap16, u16)\n-STVE(STVEWX, cpu_stl_data_ra, bswap32, u32)\n+STVE(STVEHX, cpu_stw_be_data_ra, bswap16, u16)\n+STVE(STVEWX, cpu_stl_be_data_ra, bswap32, u32)\n #undef I\n #undef LVE\n \n","prefixes":["PULL","v2","06/37"]}