{"id":2137024,"url":"http://patchwork.ozlabs.org/api/patches/2137024/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20250915080157.28195-11-clamor95@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20250915080157.28195-11-clamor95@gmail.com>","list_archive_url":null,"date":"2025-09-15T08:01:56","name":"[v3,10/11] ARM: tegra: Add EMC OPP and ICC properties to Tegra114 EMC and ACTMON device-tree nodes","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":false,"hash":"2b9307103524bcd9ec773f0479447739d05f3e9d","submitter":{"id":84146,"url":"http://patchwork.ozlabs.org/api/people/84146/?format=json","name":"Svyatoslav Ryhel","email":"clamor95@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20250915080157.28195-11-clamor95@gmail.com/mbox/","series":[{"id":473640,"url":"http://patchwork.ozlabs.org/api/series/473640/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=473640","date":"2025-09-15T08:01:46","name":"Tegra114: implement EMC support","version":3,"mbox":"http://patchwork.ozlabs.org/series/473640/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2137024/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2137024/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-tegra+bounces-9255-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=Uw/eqHKQ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2604:1380:40f1:3f00::1; helo=sy.mirrors.kernel.org;\n envelope-from=linux-tegra+bounces-9255-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"Uw/eqHKQ\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.167.45","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sy.mirrors.kernel.org (sy.mirrors.kernel.org\n [IPv6:2604:1380:40f1:3f00::1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4cQHZV50qhz1y1Y\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 15 Sep 2025 18:02:42 +1000 (AEST)","from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby sy.mirrors.kernel.org (Postfix) with ESMTPS id CC94B7A8E7D\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 15 Sep 2025 08:01:04 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id D11EA2EFDB0;\n\tMon, 15 Sep 2025 08:02:40 +0000 (UTC)","from mail-lf1-f45.google.com (mail-lf1-f45.google.com\n [209.85.167.45])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 6EB202EC546\n\tfor <linux-tegra@vger.kernel.org>; Mon, 15 Sep 2025 08:02:37 +0000 (UTC)","by mail-lf1-f45.google.com with SMTP id\n 2adb3069b0e04-5607c2f1598so4383405e87.3\n        for <linux-tegra@vger.kernel.org>;\n Mon, 15 Sep 2025 01:02:37 -0700 (PDT)","from xeon.. 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<clamor95@gmail.com>","To":"Krzysztof Kozlowski <krzk@kernel.org>,\n\tRob Herring <robh@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tThierry Reding <treding@nvidia.com>,\n\tThierry Reding <thierry.reding@gmail.com>,\n\tJonathan Hunter <jonathanh@nvidia.com>,\n\tPrashant Gaikwad <pgaikwad@nvidia.com>,\n\tMikko Perttunen <mperttunen@nvidia.com>,\n\tMichael Turquette <mturquette@baylibre.com>,\n\tStephen Boyd <sboyd@kernel.org>,\n\tDmitry Osipenko <digetx@gmail.com>,\n\tMyungJoo Ham <myungjoo.ham@samsung.com>,\n\tKyungmin Park <kyungmin.park@samsung.com>,\n\tChanwoo Choi <cw00.choi@samsung.com>,\n\tSvyatoslav Ryhel <clamor95@gmail.com>","Cc":"linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org,\n\tlinux-clk@vger.kernel.org,\n\tlinux-pm@vger.kernel.org","Subject":"[PATCH v3 10/11] ARM: tegra: Add EMC OPP and ICC properties to\n Tegra114 EMC and ACTMON device-tree nodes","Date":"Mon, 15 Sep 2025 11:01:56 +0300","Message-ID":"<20250915080157.28195-11-clamor95@gmail.com>","X-Mailer":"git-send-email 2.48.1","In-Reply-To":"<20250915080157.28195-1-clamor95@gmail.com>","References":"<20250915080157.28195-1-clamor95@gmail.com>","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"<linux-tegra.vger.kernel.org>","List-Subscribe":"<mailto:linux-tegra+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-tegra+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit"},"content":"Add EMC OPP tables and interconnect paths that will be used for\ndynamic memory bandwidth scaling based on memory utilization statistics.\n\nSigned-off-by: Svyatoslav Ryhel <clamor95@gmail.com>\n---\n .../dts/nvidia/tegra114-peripherals-opp.dtsi  | 151 ++++++++++++++++++\n arch/arm/boot/dts/nvidia/tegra114.dtsi        |   9 ++\n 2 files changed, 160 insertions(+)\n create mode 100644 arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi","diff":"diff --git a/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi b/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi\nnew file mode 100644\nindex 000000000000..1a0e68f22039\n--- /dev/null\n+++ b/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi\n@@ -0,0 +1,151 @@\n+// SPDX-License-Identifier: GPL-2.0\n+\n+/ {\n+\temc_icc_dvfs_opp_table: opp-table-emc {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-12750000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <12750000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t};\n+\n+\t\topp-20400000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <20400000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t};\n+\n+\t\topp-40800000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <40800000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t};\n+\n+\t\topp-68000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <68000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t};\n+\n+\t\topp-102000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <102000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t};\n+\n+\t\topp-204000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <204000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-suspend;\n+\t\t};\n+\n+\t\topp-312000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <312000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t};\n+\n+\t\topp-408000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <408000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t};\n+\n+\t\topp-528000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <528000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t};\n+\n+\t\topp-528000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <528000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t};\n+\n+\t\topp-624000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <624000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t};\n+\n+\t\topp-792000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <792000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t};\n+\t};\n+\n+\temc_bw_dfs_opp_table: opp-table-actmon {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-12750000 {\n+\t\t\topp-hz = /bits/ 64 <12750000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <204000>;\n+\t\t};\n+\n+\t\topp-20400000 {\n+\t\t\topp-hz = /bits/ 64 <20400000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <326400>;\n+\t\t};\n+\n+\t\topp-40800000 {\n+\t\t\topp-hz = /bits/ 64 <40800000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <652800>;\n+\t\t};\n+\n+\t\topp-68000000 {\n+\t\t\topp-hz = /bits/ 64 <68000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <1088000>;\n+\t\t};\n+\n+\t\topp-102000000 {\n+\t\t\topp-hz = /bits/ 64 <102000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <1632000>;\n+\t\t};\n+\n+\t\topp-204000000 {\n+\t\t\topp-hz = /bits/ 64 <204000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <3264000>;\n+\t\t\topp-suspend;\n+\t\t};\n+\n+\t\topp-312000000 {\n+\t\t\topp-hz = /bits/ 64 <312000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <4992000>;\n+\t\t};\n+\n+\t\topp-408000000 {\n+\t\t\topp-hz = /bits/ 64 <408000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <6528000>;\n+\t\t};\n+\n+\t\topp-528000000 {\n+\t\t\topp-hz = /bits/ 64 <528000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <8448000>;\n+\t\t};\n+\n+\t\topp-624000000 {\n+\t\t\topp-hz = /bits/ 64 <624000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <9984000>;\n+\t\t};\n+\n+\t\topp-792000000 {\n+\t\t\topp-hz = /bits/ 64 <792000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\topp-peak-kBps = <12672000>;\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi\nindex e386425c3fdf..e2bc8c2cc73c 100644\n--- a/arch/arm/boot/dts/nvidia/tegra114.dtsi\n+++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi\n@@ -8,6 +8,8 @@\n #include <dt-bindings/soc/tegra-pmc.h>\n #include <dt-bindings/thermal/tegra114-soctherm.h>\n \n+#include \"tegra114-peripherals-opp.dtsi\"\n+\n / {\n \tcompatible = \"nvidia,tegra114\";\n \tinterrupt-parent = <&lic>;\n@@ -259,6 +261,9 @@ actmon: actmon@6000c800 {\n \t\tclock-names = \"actmon\", \"emc\";\n \t\tresets = <&tegra_car TEGRA114_CLK_ACTMON>;\n \t\treset-names = \"actmon\";\n+\t\toperating-points-v2 = <&emc_bw_dfs_opp_table>;\n+\t\tinterconnects = <&mc TEGRA114_MC_MPCORER &emc>;\n+\t\tinterconnect-names = \"cpu-read\";\n \t\t#cooling-cells = <2>;\n \t};\n \n@@ -591,6 +596,7 @@ mc: memory-controller@70019000 {\n \n \t\t#reset-cells = <1>;\n \t\t#iommu-cells = <1>;\n+\t\t#interconnect-cells = <1>;\n \t};\n \n \temc: external-memory-controller@7001b000 {\n@@ -601,6 +607,9 @@ emc: external-memory-controller@7001b000 {\n \t\tclock-names = \"emc\";\n \n \t\tnvidia,memory-controller = <&mc>;\n+\t\toperating-points-v2 = <&emc_icc_dvfs_opp_table>;\n+\n+\t\t#interconnect-cells = <0>;\n \t};\n \n \thda@70030000 {\n","prefixes":["v3","10/11"]}