{"id":2137018,"url":"http://patchwork.ozlabs.org/api/patches/2137018/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20250915080157.28195-4-clamor95@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20250915080157.28195-4-clamor95@gmail.com>","list_archive_url":null,"date":"2025-09-15T08:01:49","name":"[v3,03/11] dt-bindings: memory: Document Tegra114 Memory Controller","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":false,"hash":"084a9be62d785910281986e46fd630682097b206","submitter":{"id":84146,"url":"http://patchwork.ozlabs.org/api/people/84146/?format=json","name":"Svyatoslav Ryhel","email":"clamor95@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20250915080157.28195-4-clamor95@gmail.com/mbox/","series":[{"id":473640,"url":"http://patchwork.ozlabs.org/api/series/473640/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=473640","date":"2025-09-15T08:01:46","name":"Tegra114: implement EMC support","version":3,"mbox":"http://patchwork.ozlabs.org/series/473640/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2137018/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2137018/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=EkhM5i9L;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org;\n envelope-from=linux-tegra+bounces-9248-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"EkhM5i9L\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.167.43","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sv.mirrors.kernel.org (sv.mirrors.kernel.org\n [IPv6:2604:1380:45e3:2400::1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature ECDSA (secp384r1))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4cQHZH2NX8z1y1Y\n\tfor ; Mon, 15 Sep 2025 18:02:31 +1000 (AEST)","from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby sv.mirrors.kernel.org (Postfix) with ESMTPS id 198D83ACA1F\n\tfor ; Mon, 15 Sep 2025 08:02:30 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id B6B472E6100;\n\tMon, 15 Sep 2025 08:02:29 +0000 (UTC)","from mail-lf1-f43.google.com (mail-lf1-f43.google.com\n [209.85.167.43])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 943FB2EACE9\n\tfor ; Mon, 15 Sep 2025 08:02:27 +0000 (UTC)","by mail-lf1-f43.google.com with SMTP id\n 2adb3069b0e04-55f78e3cdf9so4443605e87.1\n for ;\n Mon, 15 Sep 2025 01:02:27 -0700 (PDT)","from xeon.. ([188.163.112.70])\n by smtp.gmail.com with ESMTPSA id\n 2adb3069b0e04-56e6460dec4sm3392381e87.103.2025.09.15.01.02.23\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Mon, 15 Sep 2025 01:02:24 -0700 (PDT)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1757923349; cv=none;\n b=FsmHDNxdmp+4MdAEN5YoZsNucOlHmv8/lk55AZQWV1b/Zm8nJXxYCatvfgohugOFUr0Um1czCZOp4YsP83Z2mCuo/uBDWCdt59h7a94eWgHVw2+x8PT27O1eE2EYb8XvtO0OSxNmtVefbNL98k6UPusLqW0r0UKmkXNrchXL97I=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1757923349; c=relaxed/simple;\n\tbh=2HS2x4Zwn3/d1ZJd+mHwB+t2npx1DDRup9HpkomrkfY=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=mukry4BB0Fy3uYp4rR5ulCfCJf8Bg0HinSx7TR8W26zRGDPnfCzEoWCHKRDTEbBPVISJJDlyUqcZILtIEiQCObSWRMJwpjsc/bR+R00LiEVeUOkxCN9pO7f7f4fZFR3BScX0U8BjJexziXi2MRlLq8EpegryDWUtKjb7TVSQYNQ=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com;\n spf=pass smtp.mailfrom=gmail.com;\n dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=EkhM5i9L; arc=none smtp.client-ip=209.85.167.43","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20230601; t=1757923345; x=1758528145;\n darn=vger.kernel.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=QcvS1l+DUe5XdhH4VUkP5ymD62cqO3nzvy0Q17N2d10=;\n b=EkhM5i9LV+fdycvVn6mwYHfiey2jyjmlIooaNyDJLG9Vfeh4zdlN2VlDbBiahI7aII\n 0cONOl+65nphgOEwKQ4plT/zmY8+/Qww8nVjFGDzA3m4w4C5XTbytVO5gyWEq5AvGxXU\n 0hHPuGrNY5DdOp9Ljjmip6kFv3KJbkNMWhfBXq/J2L2WiQv94glmev+S4CjNpf5b9n9W\n 5QKGOPOTaYHR4c6R0iAHm2/wasKj9iAvUGgPU4qXAP5ju2ZxWnbY5NvBU2RrWOuM8jO7\n W5i3y1Avv+8brGYpXGSfYGHiBCM9aAvcy/aqyvl1ugC3SSRwb9qYOTaEy2yfKu8jMdOW\n UoAA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20230601; t=1757923345; x=1758528145;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc\n :subject:date:message-id:reply-to;\n bh=QcvS1l+DUe5XdhH4VUkP5ymD62cqO3nzvy0Q17N2d10=;\n b=F8lKJOAVgKPP0RKnSZ82j0N2R+napIcH8578KvH9hN7k5wtPiVf8CHD3F0m4TxZLJm\n 7DYZo8Yofs2f6IGnkaDqOCaWZTwzUjxN+gprlpaU2Eif7AKr1HPBiu+8H+fmXC2J8L1J\n 0iktNyrqtFnH8bAjIp0xVZJsbRT4Ij8Ne4CvnlLLcRDZa1iAn5ApWHNIObaLLBqtf7lU\n 02sVu0/bB0KdXGmSFz3rmCSD81jfJYZlSPPupE6u+QpbN1uMPQx7u2zWIZQGP17hQYb+\n C59CBI2RpqWeFdZX+igzTNx/1k6lfMypfqdVbFY47wRHVY6GIPs35Q9bUSjIMietoRTZ\n wx/Q==","X-Forwarded-Encrypted":"i=1;\n AJvYcCX5yNGQEa1fBUCIOlbn7ImyL1TWRmnLI3kio6EuMhK4xBuQWdJsC/ImctusT8lWryZAmLQe+RT5itPsFQ==@vger.kernel.org","X-Gm-Message-State":"AOJu0YyNCEIGhHzWIw1vKPoHr86/K5ZjKpKUlelox1wvJgo2SOLG5KxU\n\tQHweyNJ6+B/ptTrgaP4rKoiyJYocbnHtSWufdxyJt4myLrvBIGHhxxIR","X-Gm-Gg":"ASbGncvaRyVSMr+fjByiejLjVYsCwljpjxRy2GIdaBmUgxgdA1cI6/z54uYgGoKzvMe\n\tHg7aqe4wUUYohV8JywxLEWTU7M6rztD7yQ8LVa0SdyTo16qvQgga3plLcO3UnBKjZwJzVLG7Dqu\n\t8hqMzpX8Jef+QVMltS/eW9jjv8D5lHyOSsgOrWuDENCAwSTKrW4O3Do0dQOmX4xYlPSNRQgAcsE\n\tO9Cld6abh0UvURq/97fWkQrXCKg/utAmwjzjetb8vTKylT6+ZT5hiK76if27+7WBi8qfULpmzZd\n\tAx2Hx60sAI67W0YA5rPsH3zCzwnwXIG1gZdWc2XiyA3w5C+CZt/bU1SOMSufh1lwoWskMhcZIpu\n\tGp9zUYfGoU0NAUA0Nz7d6Nbhy","X-Google-Smtp-Source":"\n AGHT+IG3XB+VvXjojvfZWSOr8AupWtLXNT3yogCB7qwPpJNLsWVULqrW/kotBHJYn0rOd1mx07GyJg==","X-Received":"by 2002:a05:6512:2513:b0:55f:6883:cd26 with SMTP id\n 2adb3069b0e04-5704d1f4373mr3419989e87.32.1757923345366;\n Mon, 15 Sep 2025 01:02:25 -0700 (PDT)","From":"Svyatoslav Ryhel ","To":"Krzysztof Kozlowski ,\n\tRob Herring ,\n\tConor Dooley ,\n\tThierry Reding ,\n\tThierry Reding ,\n\tJonathan Hunter ,\n\tPrashant Gaikwad ,\n\tMikko Perttunen ,\n\tMichael Turquette ,\n\tStephen Boyd ,\n\tDmitry Osipenko ,\n\tMyungJoo Ham ,\n\tKyungmin Park ,\n\tChanwoo Choi ,\n\tSvyatoslav Ryhel ","Cc":"linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org,\n\tlinux-clk@vger.kernel.org,\n\tlinux-pm@vger.kernel.org","Subject":"[PATCH v3 03/11] dt-bindings: memory: Document Tegra114 Memory\n Controller","Date":"Mon, 15 Sep 2025 11:01:49 +0300","Message-ID":"<20250915080157.28195-4-clamor95@gmail.com>","X-Mailer":"git-send-email 2.48.1","In-Reply-To":"<20250915080157.28195-1-clamor95@gmail.com>","References":"<20250915080157.28195-1-clamor95@gmail.com>","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit"},"content":"Add Tegra114 support into existing Tegra124 MC schema with the most\nnotable difference in the amount of EMEM timings.\n\nSigned-off-by: Svyatoslav Ryhel \n---\n .../nvidia,tegra124-mc.yaml | 97 ++++++++++++++-----\n 1 file changed, 74 insertions(+), 23 deletions(-)","diff":"diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml\nindex 7b18b4d11e0a..9cc9360d3bd0 100644\n--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml\n+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml\n@@ -19,7 +19,9 @@ description: |\n \n properties:\n compatible:\n- const: nvidia,tegra124-mc\n+ enum:\n+ - nvidia,tegra114-mc\n+ - nvidia,tegra124-mc\n \n reg:\n maxItems: 1\n@@ -64,29 +66,10 @@ patternProperties:\n \n nvidia,emem-configuration:\n $ref: /schemas/types.yaml#/definitions/uint32-array\n- description: |\n+ description:\n Values to be written to the EMEM register block. See section\n- \"15.6.1 MC Registers\" in the TRM.\n- items:\n- - description: MC_EMEM_ARB_CFG\n- - description: MC_EMEM_ARB_OUTSTANDING_REQ\n- - description: MC_EMEM_ARB_TIMING_RCD\n- - description: MC_EMEM_ARB_TIMING_RP\n- - description: MC_EMEM_ARB_TIMING_RC\n- - description: MC_EMEM_ARB_TIMING_RAS\n- - description: MC_EMEM_ARB_TIMING_FAW\n- - description: MC_EMEM_ARB_TIMING_RRD\n- - description: MC_EMEM_ARB_TIMING_RAP2PRE\n- - description: MC_EMEM_ARB_TIMING_WAP2PRE\n- - description: MC_EMEM_ARB_TIMING_R2R\n- - description: MC_EMEM_ARB_TIMING_W2W\n- - description: MC_EMEM_ARB_TIMING_R2W\n- - description: MC_EMEM_ARB_TIMING_W2R\n- - description: MC_EMEM_ARB_DA_TURNS\n- - description: MC_EMEM_ARB_DA_COVERS\n- - description: MC_EMEM_ARB_MISC0\n- - description: MC_EMEM_ARB_MISC1\n- - description: MC_EMEM_ARB_RING1_THROTTLE\n+ \"20.11.1 MC Registers\" in the Tegea114 TRM or\n+ \"15.6.1 MC Registers\" in the Tegra124 TRM.\n \n required:\n - clock-frequency\n@@ -109,6 +92,74 @@ required:\n - \"#iommu-cells\"\n - \"#interconnect-cells\"\n \n+allOf:\n+ - if:\n+ properties:\n+ compatible:\n+ contains:\n+ enum:\n+ - nvidia,tegra114-mc\n+ then:\n+ patternProperties:\n+ \"^emc-timings-[0-9]+$\":\n+ patternProperties:\n+ \"^timing-[0-9]+$\":\n+ properties:\n+ nvidia,emem-configuration:\n+ items:\n+ - description: MC_EMEM_ARB_CFG\n+ - description: MC_EMEM_ARB_OUTSTANDING_REQ\n+ - description: MC_EMEM_ARB_TIMING_RCD\n+ - description: MC_EMEM_ARB_TIMING_RP\n+ - description: MC_EMEM_ARB_TIMING_RC\n+ - description: MC_EMEM_ARB_TIMING_RAS\n+ - description: MC_EMEM_ARB_TIMING_FAW\n+ - description: MC_EMEM_ARB_TIMING_RRD\n+ - description: MC_EMEM_ARB_TIMING_RAP2PRE\n+ - description: MC_EMEM_ARB_TIMING_WAP2PRE\n+ - description: MC_EMEM_ARB_TIMING_R2R\n+ - description: MC_EMEM_ARB_TIMING_W2W\n+ - description: MC_EMEM_ARB_TIMING_R2W\n+ - description: MC_EMEM_ARB_TIMING_W2R\n+ - description: MC_EMEM_ARB_DA_TURNS\n+ - description: MC_EMEM_ARB_DA_COVERS\n+ - description: MC_EMEM_ARB_MISC0\n+ - description: MC_EMEM_ARB_RING1_THROTTLE\n+\n+ - if:\n+ properties:\n+ compatible:\n+ contains:\n+ enum:\n+ - nvidia,tegra124-mc\n+ then:\n+ patternProperties:\n+ \"^emc-timings-[0-9]+$\":\n+ patternProperties:\n+ \"^timing-[0-9]+$\":\n+ properties:\n+ nvidia,emem-configuration:\n+ items:\n+ - description: MC_EMEM_ARB_CFG\n+ - description: MC_EMEM_ARB_OUTSTANDING_REQ\n+ - description: MC_EMEM_ARB_TIMING_RCD\n+ - description: MC_EMEM_ARB_TIMING_RP\n+ - description: MC_EMEM_ARB_TIMING_RC\n+ - description: MC_EMEM_ARB_TIMING_RAS\n+ - description: MC_EMEM_ARB_TIMING_FAW\n+ - description: MC_EMEM_ARB_TIMING_RRD\n+ - description: MC_EMEM_ARB_TIMING_RAP2PRE\n+ - description: MC_EMEM_ARB_TIMING_WAP2PRE\n+ - description: MC_EMEM_ARB_TIMING_R2R\n+ - description: MC_EMEM_ARB_TIMING_W2W\n+ - description: MC_EMEM_ARB_TIMING_R2W\n+ - description: MC_EMEM_ARB_TIMING_W2R\n+ - description: MC_EMEM_ARB_DA_TURNS\n+ - description: MC_EMEM_ARB_DA_COVERS\n+ - description: MC_EMEM_ARB_MISC0\n+ - description: MC_EMEM_ARB_MISC1\n+ - description: MC_EMEM_ARB_RING1_THROTTLE\n+\n additionalProperties: false\n \n examples:\n","prefixes":["v3","03/11"]}