{"id":2070363,"url":"http://patchwork.ozlabs.org/api/patches/2070363/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20250409023711.2960618-3-maobibo@loongson.cn/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20250409023711.2960618-3-maobibo@loongson.cn>","list_archive_url":null,"date":"2025-04-09T02:36:57","name":"[v3,02/16] hw/intc/loongarch_pch: Modify register name PCH_PIC_xxx_OFFSET with PCH_PIC_xxx","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"786a3c902011cda0d05ee116f468fe4e7b1fa570","submitter":{"id":78914,"url":"http://patchwork.ozlabs.org/api/people/78914/?format=json","name":"Bibo Mao","email":"maobibo@loongson.cn"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20250409023711.2960618-3-maobibo@loongson.cn/mbox/","series":[{"id":451861,"url":"http://patchwork.ozlabs.org/api/series/451861/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=451861","date":"2025-04-09T02:37:00","name":"hw/intc/loongarch_pch: Cleanup with memory region ops","version":3,"mbox":"http://patchwork.ozlabs.org/series/451861/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2070363/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2070363/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":"legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)","Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4ZXRvp6WmHz1yHS\n\tfor ; Wed, 9 Apr 2025 12:38:30 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1u2LJm-0006XV-UF; Tue, 08 Apr 2025 22:37:34 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1u2LJl-0006WW-3F\n for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:33 -0400","from mail.loongson.cn ([114.242.206.163])\n by eggs.gnu.org with esmtp (Exim 4.90_1)\n (envelope-from ) id 1u2LJc-0007n7-H4\n for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:37:32 -0400","from loongson.cn (unknown [10.2.10.34])\n by gateway (Coremail) with SMTP id _____8BxrOJa3fVnEa+1AA--.1206S3;\n Wed, 09 Apr 2025 10:37:14 +0800 (CST)","from localhost.localdomain (unknown [10.2.10.34])\n by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S4;\n Wed, 09 Apr 2025 10:37:13 +0800 (CST)"],"From":"Bibo Mao ","To":"Song Gao ","Cc":"Jiaxun Yang ,\n\tqemu-devel@nongnu.org","Subject":"[PATCH v3 02/16] hw/intc/loongarch_pch: Modify register name\n PCH_PIC_xxx_OFFSET with PCH_PIC_xxx","Date":"Wed, 9 Apr 2025 10:36:57 +0800","Message-Id":"<20250409023711.2960618-3-maobibo@loongson.cn>","X-Mailer":"git-send-email 2.39.3","In-Reply-To":"<20250409023711.2960618-1-maobibo@loongson.cn>","References":"<20250409023711.2960618-1-maobibo@loongson.cn>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-CM-TRANSID":"qMiowMBxLsdY3fVnnsR1AA--.28294S4","X-CM-SenderInfo":"xpdruxter6z05rqj20fqof0/","X-Coremail-Antispam":"1Uk129KBj93XoWxGry5uw13Xr1fArW7AF4UKFX_yoWrWry8pF\n 9xAFy2yr47JFZ7Wrn7J3yDZw1xWFn2k342g39I9FyxAFW5XrykXa40y34DGa4UK34kA3y5\n XFs8Gw4Y9a17WwbCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa\n sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU\n 0xBIdaVrnRJUUUyEb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2\n IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v\n e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI\n 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_\n GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4\n xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JF0_Jw1lYx0Ex4A2jsIE14v2\n 6r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwI\n xGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480\n Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIxAIcVC0I7\n IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k2\n 6cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxV\n AFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU82g43UUUUU==","Received-SPF":"pass client-ip=114.242.206.163;\n envelope-from=maobibo@loongson.cn;\n helo=mail.loongson.cn","X-Spam_score_int":"-18","X-Spam_score":"-1.9","X-Spam_bar":"-","X-Spam_report":"(-1.9 / 5.0 requ) BAYES_00=-1.9,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Macro PCH_PIC_HTMSI_VEC_OFFSET and PCH_PIC_ROUTE_ENTRY_OFFSET is renamed\nas PCH_PIC_HTMSI_VEC and PCH_PIC_ROUTE_ENTRY separately, it is easier to\nunderstand.\n\nSigned-off-by: Bibo Mao \n---\n hw/intc/loongarch_pch_pic.c | 20 ++++++++++----------\n hw/loongarch/virt.c | 2 +-\n include/hw/intc/loongarch_pic_common.h | 4 ++--\n 3 files changed, 13 insertions(+), 13 deletions(-)","diff":"diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c\nindex 2b90ccd1ff..4c845ba5e9 100644\n--- a/hw/intc/loongarch_pch_pic.c\n+++ b/hw/intc/loongarch_pch_pic.c\n@@ -263,18 +263,18 @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,\n {\n LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);\n uint64_t val = 0;\n- uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;\n+ uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY;\n int64_t offset_tmp;\n \n switch (offset) {\n- case PCH_PIC_HTMSI_VEC_OFFSET ... PCH_PIC_HTMSI_VEC_END:\n- offset_tmp = offset - PCH_PIC_HTMSI_VEC_OFFSET;\n+ case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END:\n+ offset_tmp = offset - PCH_PIC_HTMSI_VEC;\n if (offset_tmp >= 0 && offset_tmp < 64) {\n val = s->htmsi_vector[offset_tmp];\n }\n break;\n- case PCH_PIC_ROUTE_ENTRY_OFFSET ... PCH_PIC_ROUTE_ENTRY_END:\n- offset_tmp = offset - PCH_PIC_ROUTE_ENTRY_OFFSET;\n+ case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END:\n+ offset_tmp = offset - PCH_PIC_ROUTE_ENTRY;\n if (offset_tmp >= 0 && offset_tmp < 64) {\n val = s->route_entry[offset_tmp];\n }\n@@ -292,19 +292,19 @@ static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr,\n {\n LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);\n int32_t offset_tmp;\n- uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;\n+ uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY;\n \n trace_loongarch_pch_pic_writeb(size, addr, data);\n \n switch (offset) {\n- case PCH_PIC_HTMSI_VEC_OFFSET ... PCH_PIC_HTMSI_VEC_END:\n- offset_tmp = offset - PCH_PIC_HTMSI_VEC_OFFSET;\n+ case PCH_PIC_HTMSI_VEC ... PCH_PIC_HTMSI_VEC_END:\n+ offset_tmp = offset - PCH_PIC_HTMSI_VEC;\n if (offset_tmp >= 0 && offset_tmp < 64) {\n s->htmsi_vector[offset_tmp] = (uint8_t)(data & 0xff);\n }\n break;\n- case PCH_PIC_ROUTE_ENTRY_OFFSET ... PCH_PIC_ROUTE_ENTRY_END:\n- offset_tmp = offset - PCH_PIC_ROUTE_ENTRY_OFFSET;\n+ case PCH_PIC_ROUTE_ENTRY ... PCH_PIC_ROUTE_ENTRY_END:\n+ offset_tmp = offset - PCH_PIC_ROUTE_ENTRY;\n if (offset_tmp >= 0 && offset_tmp < 64) {\n s->route_entry[offset_tmp] = (uint8_t)(data & 0xff);\n }\ndiff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c\nindex 8c0cc98c72..1f1cca667e 100644\n--- a/hw/loongarch/virt.c\n+++ b/hw/loongarch/virt.c\n@@ -429,7 +429,7 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)\n memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE,\n sysbus_mmio_get_region(d, 0));\n memory_region_add_subregion(get_system_memory(),\n- VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY_OFFSET,\n+ VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY,\n sysbus_mmio_get_region(d, 1));\n memory_region_add_subregion(get_system_memory(),\n VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS,\ndiff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h\nindex c04471b08d..b33bebb129 100644\n--- a/include/hw/intc/loongarch_pic_common.h\n+++ b/include/hw/intc/loongarch_pic_common.h\n@@ -19,9 +19,9 @@\n #define PCH_PIC_INT_CLEAR 0x80\n #define PCH_PIC_AUTO_CTRL0 0xc0\n #define PCH_PIC_AUTO_CTRL1 0xe0\n-#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100\n+#define PCH_PIC_ROUTE_ENTRY 0x100\n #define PCH_PIC_ROUTE_ENTRY_END 0x13f\n-#define PCH_PIC_HTMSI_VEC_OFFSET 0x200\n+#define PCH_PIC_HTMSI_VEC 0x200\n #define PCH_PIC_HTMSI_VEC_END 0x23f\n #define PCH_PIC_INT_STATUS 0x3a0\n #define PCH_PIC_INT_POL 0x3e0\n","prefixes":["v3","02/16"]}