{"id":2070359,"url":"http://patchwork.ozlabs.org/api/patches/2070359/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20250409023711.2960618-11-maobibo@loongson.cn/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20250409023711.2960618-11-maobibo@loongson.cn>","list_archive_url":null,"date":"2025-04-09T02:37:05","name":"[v3,10/16] hw/intc/loongarch_pch: Use generic write callback for iomem32_low region","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8a484034e36e8fe597136c904be1b73cd1b1e835","submitter":{"id":78914,"url":"http://patchwork.ozlabs.org/api/people/78914/?format=json","name":"Bibo Mao","email":"maobibo@loongson.cn"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20250409023711.2960618-11-maobibo@loongson.cn/mbox/","series":[{"id":451861,"url":"http://patchwork.ozlabs.org/api/series/451861/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=451861","date":"2025-04-09T02:37:00","name":"hw/intc/loongarch_pch: Cleanup with memory region ops","version":3,"mbox":"http://patchwork.ozlabs.org/series/451861/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2070359/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2070359/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":"legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n 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loongson.cn (unknown [10.2.10.34])\n by gateway (Coremail) with SMTP id _____8AxDGte3fVnIq+1AA--.39723S3;\n Wed, 09 Apr 2025 10:37:18 +0800 (CST)","from localhost.localdomain (unknown [10.2.10.34])\n by front1 (Coremail) with SMTP id qMiowMBxLsdY3fVnnsR1AA--.28294S12;\n Wed, 09 Apr 2025 10:37:18 +0800 (CST)"],"From":"Bibo Mao ","To":"Song Gao ","Cc":"Jiaxun Yang ,\n\tqemu-devel@nongnu.org","Subject":"[PATCH v3 10/16] hw/intc/loongarch_pch: Use generic write callback\n for iomem32_low region","Date":"Wed, 9 Apr 2025 10:37:05 +0800","Message-Id":"<20250409023711.2960618-11-maobibo@loongson.cn>","X-Mailer":"git-send-email 2.39.3","In-Reply-To":"<20250409023711.2960618-1-maobibo@loongson.cn>","References":"<20250409023711.2960618-1-maobibo@loongson.cn>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-CM-TRANSID":"qMiowMBxLsdY3fVnnsR1AA--.28294S12","X-CM-SenderInfo":"xpdruxter6z05rqj20fqof0/","X-Coremail-Antispam":"1Uk129KBj93XoWxWF48AFyUuF1xKF1rCw47Jrc_yoWrtFy3pr\n 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hw/intc/loongarch_pch_pic.c | 140 +++++++++++++++++++-----------------\n 1 file changed, 73 insertions(+), 67 deletions(-)","diff":"diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c\nindex 06fac16211..84f3bd1a2e 100644\n--- a/hw/intc/loongarch_pch_pic.c\n+++ b/hw/intc/loongarch_pch_pic.c\n@@ -118,6 +118,53 @@ static uint64_t pch_pic_read(void *opaque, hwaddr addr, uint64_t field_mask)\n return (val >> (offset * 8)) & field_mask;\n }\n \n+static void pch_pic_write(void *opaque, hwaddr addr, uint64_t value,\n+ uint64_t field_mask)\n+{\n+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);\n+ uint32_t offset;\n+ uint64_t old, mask, data;\n+\n+ offset = addr & 7;\n+ addr -= offset;\n+ mask = field_mask << (offset * 8);\n+ data = (value & field_mask) << (offset * 8);\n+ switch (addr) {\n+ case PCH_PIC_INT_MASK:\n+ old = s->int_mask;\n+ s->int_mask = (old & ~mask) | data;\n+ if (old & ~data) {\n+ pch_pic_update_irq(s, old & ~data, 1);\n+ }\n+\n+ if (~old & data) {\n+ pch_pic_update_irq(s, ~old & data, 0);\n+ }\n+ break;\n+ case PCH_PIC_INT_EDGE:\n+ s->intedge = (s->intedge & ~mask) | data;\n+ break;\n+ case PCH_PIC_INT_CLEAR:\n+ if (s->intedge & data) {\n+ s->intirr &= ~data;\n+ pch_pic_update_irq(s, data, 0);\n+ s->intisr &= ~data;\n+ }\n+ break;\n+ case PCH_PIC_HTMSI_EN:\n+ s->htmsi_en = (s->htmsi_en & ~mask) | data;\n+ break;\n+ case PCH_PIC_AUTO_CTRL0:\n+ case PCH_PIC_AUTO_CTRL1:\n+ /* Discard auto_ctrl access */\n+ break;\n+ default:\n+ qemu_log_mask(LOG_GUEST_ERROR,\n+ \"pch_pic_write: Bad address 0x%\"PRIx64\"\\n\", addr);\n+ break;\n+ }\n+}\n+\n static uint64_t loongarch_pch_pic_read(void *opaque, hwaddr addr,\n unsigned size)\n {\n@@ -145,6 +192,30 @@ static uint64_t loongarch_pch_pic_read(void *opaque, hwaddr addr,\n return val;\n }\n \n+static void loongarch_pch_pic_write(void *opaque, hwaddr addr,\n+ uint64_t value, unsigned size)\n+{\n+ switch (size) {\n+ case 1:\n+ pch_pic_write(opaque, addr, value, UCHAR_MAX);\n+ break;\n+ case 2:\n+ pch_pic_write(opaque, addr, value, USHRT_MAX);\n+ break;\n+ break;\n+ case 4:\n+ pch_pic_write(opaque, addr, value, UINT_MAX);\n+ break;\n+ case 8:\n+ pch_pic_write(opaque, addr, value, UINT64_MAX);\n+ break;\n+ default:\n+ qemu_log_mask(LOG_GUEST_ERROR,\n+ \"loongarch_pch_pic_write: Bad size %d\\n\", size);\n+ break;\n+ }\n+}\n+\n static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr,\n unsigned size)\n {\n@@ -166,73 +237,8 @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi)\n static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,\n uint64_t value, unsigned size)\n {\n- LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);\n- uint32_t old_valid, data = (uint32_t)value;\n- uint64_t old, int_mask;\n-\n- trace_loongarch_pch_pic_low_writew(size, addr, data);\n-\n- switch (addr) {\n- case PCH_PIC_INT_MASK:\n- old = s->int_mask;\n- s->int_mask = get_writew_val(old, data, 0);\n- old_valid = (uint32_t)old;\n- if (old_valid & ~data) {\n- pch_pic_update_irq(s, (old_valid & ~data), 1);\n- }\n- if (~old_valid & data) {\n- pch_pic_update_irq(s, (~old_valid & data), 0);\n- }\n- break;\n- case PCH_PIC_INT_MASK + 4:\n- old = s->int_mask;\n- s->int_mask = get_writew_val(old, data, 1);\n- old_valid = (uint32_t)(old >> 32);\n- int_mask = old_valid & ~data;\n- if (int_mask) {\n- pch_pic_update_irq(s, int_mask << 32, 1);\n- }\n- int_mask = ~old_valid & data;\n- if (int_mask) {\n- pch_pic_update_irq(s, int_mask << 32, 0);\n- }\n- break;\n- case PCH_PIC_INT_EDGE:\n- s->intedge = get_writew_val(s->intedge, data, 0);\n- break;\n- case PCH_PIC_INT_EDGE + 4:\n- s->intedge = get_writew_val(s->intedge, data, 1);\n- break;\n- case PCH_PIC_INT_CLEAR:\n- if (s->intedge & data) {\n- s->intirr &= (~data);\n- pch_pic_update_irq(s, data, 0);\n- s->intisr &= (~data);\n- }\n- break;\n- case PCH_PIC_INT_CLEAR + 4:\n- value <<= 32;\n- if (s->intedge & value) {\n- s->intirr &= (~value);\n- pch_pic_update_irq(s, value, 0);\n- s->intisr &= (~value);\n- }\n- break;\n- case PCH_PIC_HTMSI_EN:\n- s->htmsi_en = get_writew_val(s->htmsi_en, data, 0);\n- break;\n- case PCH_PIC_HTMSI_EN + 4:\n- s->htmsi_en = get_writew_val(s->htmsi_en, data, 1);\n- break;\n- case PCH_PIC_AUTO_CTRL0:\n- case PCH_PIC_AUTO_CTRL0 + 4:\n- case PCH_PIC_AUTO_CTRL1:\n- case PCH_PIC_AUTO_CTRL1 + 4:\n- /* discard auto_ctrl access */\n- break;\n- default:\n- break;\n- }\n+ trace_loongarch_pch_pic_low_writew(size, addr, value);\n+ loongarch_pch_pic_write(opaque, addr, value, size);\n }\n \n static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,\n","prefixes":["v3","10/16"]}