{"id":2000259,"url":"http://patchwork.ozlabs.org/api/patches/2000259/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/91c60e8db41f6709d37889a2a7af56f930a703b9.1729577070.git.jan.kiszka@siemens.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<91c60e8db41f6709d37889a2a7af56f930a703b9.1729577070.git.jan.kiszka@siemens.com>","list_archive_url":null,"date":"2024-10-22T06:04:20","name":"[v2,03/13] board: siemens: iot2050: Control pcie power for all variants","commit_ref":"5b55635ee12dc2223f91550293f4efc86c38ed79","pull_url":null,"state":"accepted","archived":false,"hash":"18105675fa52eb04f3e5c59bce1fbee58f27cb45","submitter":{"id":710,"url":"http://patchwork.ozlabs.org/api/people/710/?format=json","name":"Jan Kiszka","email":"jan.kiszka@siemens.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/91c60e8db41f6709d37889a2a7af56f930a703b9.1729577070.git.jan.kiszka@siemens.com/mbox/","series":[{"id":429111,"url":"http://patchwork.ozlabs.org/api/series/429111/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=429111","date":"2024-10-22T06:04:17","name":"boards: siemens: iot2050: SM variant, sysinfo support, fixes & cleanups","version":2,"mbox":"http://patchwork.ozlabs.org/series/429111/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2000259/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2000259/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=siemens.com header.i=jan.kiszka@siemens.com\n header.a=rsa-sha256 header.s=fm1 header.b=ORdwe9+2;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Tue, 22 Oct 2024 08:04:35 +0200 (CEST)","from mta-64-228.siemens.flowmailer.net\n (mta-64-228.siemens.flowmailer.net [185.136.64.228])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 98A0088F47\n for ; Tue, 22 Oct 2024 08:04:32 +0200 (CEST)","by mta-64-228.siemens.flowmailer.net with ESMTPSA id\n 20241022060432ed3b1df2f80b1e8690 for ;\n Tue, 22 Oct 2024 08:04:32 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_MED,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,\n RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED,\n SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2","DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1;\n d=siemens.com; i=jan.kiszka@siemens.com;\n h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To;\n bh=Lv0ut2tY6XlI1jFjodmFd39h11wE5epFQMypq6ar62Q=;\n b=ORdwe9+29Fp4GgDLkT0Go5SDlZQwK0Pw4Zic2+aLHrLZBVCGBAX89xobImgJUuRuwNGr4U\n R658SNsWV/wewcQycjxkxK/U3EP97xSk88FyfEhdclJBLImZszI6RNCF8GQhRvZYMGOGtFN8\n gqWIip32OLTzxTR5uO3FNBncSahaBTvJWlYThAmqMXbb2nZlR+89xxfxWd2qBpPhgn8gG6H9\n tfqIt1US6HxAHAw7fXFw9g9rXsSEOHJyCKlbeiiSfGLc5AOaTdTO7ADUPswYekFYuB9SRUuu\n kEvpu1SzpFEY8MicTgpVAWDDOsns+aVW2l/G6ZxEaNTz4S8KK/E1K96Q==;","From":"Jan Kiszka ","To":"U-Boot Mailing List ","Cc":"Bryan Brattlof ,\n\tNishanth Menon ","Subject":"[PATCH v2 03/13] board: siemens: iot2050: Control pcie power for all\n variants","Date":"Tue, 22 Oct 2024 08:04:20 +0200","Message-ID":"\n <91c60e8db41f6709d37889a2a7af56f930a703b9.1729577070.git.jan.kiszka@siemens.com>","In-Reply-To":"","References":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Flowmailer-Platform":"Siemens","Feedback-ID":"519:519-294854:519-21489:flowmailer","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Baocheng Su \n\nThe power control pin of pcie interface not only works for M.2 interface\nbut also for miniPCIE, so promote this logic to all variants to\nworkaround the module hang issue.\n\nSigned-off-by: Baocheng Su \nSigned-off-by: Jan Kiszka \n---\n board/siemens/iot2050/board.c | 12 ++++++++----\n 1 file changed, 8 insertions(+), 4 deletions(-)","diff":"diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c\nindex e5c7ce58b06..85cb999f17f 100644\n--- a/board/siemens/iot2050/board.c\n+++ b/board/siemens/iot2050/board.c\n@@ -185,6 +185,12 @@ static void remove_mmc1_target(void)\n \tfree(boot_targets);\n }\n \n+static void enable_pcie_connector_power(void)\n+{\n+\tset_pinvalue(\"gpio@601000_17\", \"P3V3_PCIE_CON_EN\", 1);\n+\tudelay(4 * 100);\n+}\n+\n void set_board_info_env(void)\n {\n \tstruct iot2050_info *info = IOT2050_INFO_DATA;\n@@ -288,10 +294,6 @@ static void m2_connector_setup(void)\n \tstruct m2_config_pins config_pins;\n \tunsigned int n;\n \n-\t/* enable M.2 connector power */\n-\tset_pinvalue(\"gpio@601000_17\", \"P3V3_M2_EN\", 1);\n-\tudelay(4 * 100);\n-\n \tif (m2_manual_config < CONNECTOR_MODE_INVALID) {\n \t\tmode_info = \" [manual mode]\";\n \t\tconnector_mode = m2_manual_config;\n@@ -429,6 +431,8 @@ int board_late_init(void)\n \t/* change CTRL_MMR register to let serdes0 not output USB3.0 signals. */\n \twritel(0x3, SERDES0_LANE_SELECT);\n \n+\tenable_pcie_connector_power();\n+\n \tif (board_is_m2())\n \t\tm2_connector_setup();\n \n","prefixes":["v2","03/13"]}