{"id":1941009,"url":"http://patchwork.ozlabs.org/api/patches/1941009/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/e35aa188e5176544c6884f2d1d7aa1b242a51acf.1716965617.git.ysato@users.sourceforge.jp/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2024-05-29T08:01:05","name":"[DO,NOT,MERGE,v8,19/36] dt-bindings: interrupt-controller: renesas,sh7751-irl-ext: Add json-schema","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"66d11d8da52031e731ece7701a7bebd3edcf8b1d","submitter":{"id":7114,"url":"http://patchwork.ozlabs.org/api/people/7114/?format=json","name":"Yoshinori Sato","email":"ysato@users.sourceforge.jp"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/e35aa188e5176544c6884f2d1d7aa1b242a51acf.1716965617.git.ysato@users.sourceforge.jp/mbox/","series":[{"id":408652,"url":"http://patchwork.ozlabs.org/api/series/408652/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=408652","date":"2024-05-29T08:00:51","name":"Device Tree support for SH7751 based board","version":8,"mbox":"http://patchwork.ozlabs.org/series/408652/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1941009/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1941009/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=147.75.199.223; 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smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=users.sourceforge.jp;\n spf=fail smtp.mailfrom=users.sourceforge.jp;\n arc=none smtp.client-ip=153.127.30.23","From":"Yoshinori Sato ","To":"linux-sh@vger.kernel.org","Cc":"Yoshinori Sato ,\n Damien Le Moal , Niklas Cassel ,\n Rob Herring , Krzysztof Kozlowski ,\n Conor Dooley ,\n Geert Uytterhoeven ,\n Michael Turquette , Stephen Boyd ,\n David Airlie , Daniel Vetter ,\n Maarten Lankhorst ,\n Maxime Ripard , Thomas Zimmermann ,\n Thomas Gleixner , Bjorn Helgaas ,\n Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= ,\n Greg Kroah-Hartman ,\n Jiri Slaby , Magnus Damm ,\n Daniel Lezcano , Rich Felker ,\n John Paul Adrian Glaubitz ,\n Lee Jones , Helge Deller ,\n Heiko Stuebner ,\n Neil Armstrong ,\n Chris Morgan , Sebastian Reichel ,\n Linus Walleij , Arnd Bergmann ,\n Masahiro Yamada , Baoquan He ,\n Andrew Morton ,\n Guenter Roeck , Kefeng Wang ,\n Stephen Rothwell ,\n Azeem Shaikh , Guo Ren ,\n Max Filippov , Jernej Skrabec ,\n Herve Codina ,\n Andy Shevchenko ,\n Anup Patel , Jacky Huang ,\n Hugo Villeneuve , Jonathan Corbet ,\n Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?=\n\t=?utf-8?q?=C3=B6nig?= ,\n Christophe JAILLET ,\n Sam Ravnborg ,\n Javier Martinez Canillas ,\n Sergey Shtylyov ,\n Laurent Pinchart ,\n linux-ide@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org,\n linux-pci@vger.kernel.org, linux-serial@vger.kernel.org,\n linux-fbdev@vger.kernel.org","Subject":"[DO NOT MERGE v8 19/36] dt-bindings: interrupt-controller:\n renesas,sh7751-irl-ext: Add json-schema","Date":"Wed, 29 May 2024 17:01:05 +0900","Message-Id":"\n ","X-Mailer":"git-send-email 2.39.2","In-Reply-To":"","References":"","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit"},"content":"Renesas SH7751 external interrupt encoder json-schema.\n\nSigned-off-by: Yoshinori Sato \n---\n .../renesas,sh7751-irl-ext.yaml | 57 +++++++++++++++++++\n 1 file changed, 57 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml","diff":"diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml\nnew file mode 100644\nindex 000000000000..ff70d57b86cd\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml\n@@ -0,0 +1,57 @@\n+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-irl-ext.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Renesas SH7751 external interrupt encoder with enable regs.\n+\n+maintainers:\n+ - Yoshinori Sato \n+\n+description:\n+ This is the generally used external interrupt encoder on SH7751 based boards.\n+\n+properties:\n+ compatible:\n+ items:\n+ - const: renesas,sh7751-irl-ext\n+\n+ reg: true\n+\n+ interrupt-controller: true\n+\n+ '#interrupt-cells':\n+ const: 2\n+\n+ '#address-cells':\n+ const: 0\n+\n+ renesas,set-to-disable:\n+ $ref: /schemas/types.yaml#/definitions/flag\n+ description: Invert enable registers. Setting the bit to 0 enables interrupts.\n+\n+ renesas,enable-reg:\n+ $ref: /schemas/types.yaml#/definitions/uint32-array\n+ description: |\n+ IRQ enable register bit mapping\n+\n+required:\n+ - compatible\n+ - reg\n+ - interrupt-controller\n+ - '#interrupt-cells'\n+ - renesas,enable-reg\n+\n+additionalProperties: false\n+\n+examples:\n+ - |\n+ r2dintc: interrupt-controller@a4000000 {\n+ compatible = \"renesas,sh7751-irl-ext\";\n+ reg = <0xa4000000 0x02>;\n+ interrupt-controller;\n+ #address-cells = <0>;\n+ #interrupt-cells = <2>;\n+ renesas,enable-reg = <12 9 10 3 0 4 1 2 8 5 6 7 15 15 15 11>;\n+ };\n","prefixes":["DO","NOT","MERGE","v8","19/36"]}