{"id":1940983,"url":"http://patchwork.ozlabs.org/api/patches/1940983/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/f40e91e3f010880b0cf7a1c3a18d0c57bb55d93a.1716965617.git.ysato@users.sourceforge.jp/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2024-05-29T08:00:54","name":"[DO,NOT,MERGE,v8,08/36] clocksource: sh_tmu: CLOCKSOURCE support.","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b5936f52022e67db6db1a9c286e3ceee03865bf9","submitter":{"id":7114,"url":"http://patchwork.ozlabs.org/api/people/7114/?format=json","name":"Yoshinori Sato","email":"ysato@users.sourceforge.jp"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/f40e91e3f010880b0cf7a1c3a18d0c57bb55d93a.1716965617.git.ysato@users.sourceforge.jp/mbox/","series":[{"id":408652,"url":"http://patchwork.ozlabs.org/api/series/408652/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=408652","date":"2024-05-29T08:00:51","name":"Device Tree support for SH7751 based board","version":8,"mbox":"http://patchwork.ozlabs.org/series/408652/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1940983/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1940983/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n 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d=subspace.kernel.org;\n\ts=arc-20240116; t=1716969706; c=relaxed/simple;\n\tbh=iMBrZpOu9yUG+iDc33xgYv2Kqd5WhU8tNgZ7/X7ZzJ4=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:\n\t MIME-Version;\n b=hPduGRK/sMh/TgwnP+qCNGt/NYw9f2WGfFAFVIYWT88H2qmGRXMFAsANCN7Nk/25j/RoPdCGAgQvQczIeJ7g08PTOcMxwdcS17dqRTkrnyf6ia5fso4TRGpNwnrQIeGwiyp3czUAKnn09zRcHd4M/BGpyaDE2lAjkIGKxqR7tPQ=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=users.sourceforge.jp;\n spf=fail smtp.mailfrom=users.sourceforge.jp;\n arc=none smtp.client-ip=153.127.30.23","From":"Yoshinori Sato ","To":"linux-sh@vger.kernel.org","Cc":"Yoshinori Sato ,\n Damien Le Moal , Niklas Cassel ,\n Rob Herring , Krzysztof Kozlowski ,\n Conor Dooley ,\n Geert Uytterhoeven ,\n Michael Turquette , Stephen Boyd ,\n David Airlie , Daniel Vetter ,\n Maarten Lankhorst ,\n Maxime Ripard , Thomas Zimmermann ,\n Thomas Gleixner , Bjorn Helgaas ,\n Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= ,\n Greg Kroah-Hartman ,\n Jiri Slaby , Magnus Damm ,\n Daniel Lezcano , Rich Felker ,\n John Paul Adrian Glaubitz ,\n Lee Jones , Helge Deller ,\n Heiko Stuebner ,\n Neil Armstrong ,\n Chris Morgan , Sebastian Reichel ,\n Linus Walleij , Arnd Bergmann ,\n Masahiro Yamada , Baoquan He ,\n Andrew Morton ,\n Guenter Roeck , Kefeng Wang ,\n Stephen Rothwell ,\n Azeem Shaikh , Guo Ren ,\n Max Filippov , Jernej Skrabec ,\n Herve Codina ,\n Andy Shevchenko ,\n Anup Patel , Jacky Huang ,\n Hugo Villeneuve , Jonathan Corbet ,\n Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?=\n\t=?utf-8?q?=C3=B6nig?= ,\n Christophe JAILLET ,\n Sam Ravnborg ,\n Javier Martinez Canillas ,\n Sergey Shtylyov ,\n Laurent Pinchart ,\n linux-ide@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org,\n linux-pci@vger.kernel.org, linux-serial@vger.kernel.org,\n linux-fbdev@vger.kernel.org","Subject":"[DO NOT MERGE v8 08/36] clocksource: sh_tmu: CLOCKSOURCE support.","Date":"Wed, 29 May 2024 17:00:54 +0900","Message-Id":"\n ","X-Mailer":"git-send-email 2.39.2","In-Reply-To":"","References":"","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit"},"content":"Allows initialization as CLOCKSOURCE.\n\nSigned-off-by: Yoshinori Sato \n---\n drivers/clocksource/sh_tmu.c | 198 +++++++++++++++++++++++------------\n 1 file changed, 132 insertions(+), 66 deletions(-)","diff":"diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c\nindex beffff81c00f..ce3004a73dcb 100644\n--- a/drivers/clocksource/sh_tmu.c\n+++ b/drivers/clocksource/sh_tmu.c\n@@ -17,6 +17,8 @@\n #include \n #include \n #include \n+#include \n+#include \n #include \n #include \n #include \n@@ -51,6 +53,7 @@ struct sh_tmu_channel {\n \n struct sh_tmu_device {\n \tstruct platform_device *pdev;\n+\tstruct device_node *np;\n \n \tvoid __iomem *mapbase;\n \tstruct clk *clk;\n@@ -65,6 +68,7 @@ struct sh_tmu_device {\n \n \tbool has_clockevent;\n \tbool has_clocksource;\n+\tconst char *name;\n };\n \n #define TSTR -1 /* shared register */\n@@ -148,8 +152,8 @@ static int __sh_tmu_enable(struct sh_tmu_channel *ch)\n \t/* enable clock */\n \tret = clk_enable(ch->tmu->clk);\n \tif (ret) {\n-\t\tdev_err(&ch->tmu->pdev->dev, \"ch%u: cannot enable clock\\n\",\n-\t\t\tch->index);\n+\t\tpr_err(\"%s ch%u: cannot enable clock\\n\",\n+\t\t ch->tmu->name, ch->index);\n \t\treturn ret;\n \t}\n \n@@ -174,9 +178,10 @@ static int sh_tmu_enable(struct sh_tmu_channel *ch)\n \tif (ch->enable_count++ > 0)\n \t\treturn 0;\n \n-\tpm_runtime_get_sync(&ch->tmu->pdev->dev);\n-\tdev_pm_syscore_device(&ch->tmu->pdev->dev, true);\n-\n+\tif (ch->tmu->pdev) {\n+\t\tpm_runtime_get_sync(&ch->tmu->pdev->dev);\n+\t\tdev_pm_syscore_device(&ch->tmu->pdev->dev, true);\n+\t}\n \treturn __sh_tmu_enable(ch);\n }\n \n@@ -202,8 +207,10 @@ static void sh_tmu_disable(struct sh_tmu_channel *ch)\n \n \t__sh_tmu_disable(ch);\n \n-\tdev_pm_syscore_device(&ch->tmu->pdev->dev, false);\n-\tpm_runtime_put(&ch->tmu->pdev->dev);\n+\tif (ch->tmu->pdev) {\n+\t\tdev_pm_syscore_device(&ch->tmu->pdev->dev, false);\n+\t\tpm_runtime_put(&ch->tmu->pdev->dev);\n+\t}\n }\n \n static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta,\n@@ -245,7 +252,7 @@ static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id)\n \treturn IRQ_HANDLED;\n }\n \n-static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)\n+static inline struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)\n {\n \treturn container_of(cs, struct sh_tmu_channel, cs);\n }\n@@ -292,7 +299,8 @@ static void sh_tmu_clocksource_suspend(struct clocksource *cs)\n \n \tif (--ch->enable_count == 0) {\n \t\t__sh_tmu_disable(ch);\n-\t\tdev_pm_genpd_suspend(&ch->tmu->pdev->dev);\n+\t\tif (ch->tmu->pdev)\n+\t\t\tdev_pm_genpd_suspend(&ch->tmu->pdev->dev);\n \t}\n }\n \n@@ -304,7 +312,8 @@ static void sh_tmu_clocksource_resume(struct clocksource *cs)\n \t\treturn;\n \n \tif (ch->enable_count++ == 0) {\n-\t\tdev_pm_genpd_resume(&ch->tmu->pdev->dev);\n+\t\tif (ch->tmu->pdev)\n+\t\t\tdev_pm_genpd_resume(&ch->tmu->pdev->dev);\n \t\t__sh_tmu_enable(ch);\n \t}\n }\n@@ -324,14 +333,14 @@ static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch,\n \tcs->mask = CLOCKSOURCE_MASK(32);\n \tcs->flags = CLOCK_SOURCE_IS_CONTINUOUS;\n \n-\tdev_info(&ch->tmu->pdev->dev, \"ch%u: used as clock source\\n\",\n-\t\t ch->index);\n+\tpr_info(\"%s ch%u: used as clock source\\n\",\n+\t\tch->tmu->name, ch->index);\n \n \tclocksource_register_hz(cs, ch->tmu->rate);\n \treturn 0;\n }\n \n-static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced)\n+static inline struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced)\n {\n \treturn container_of(ced, struct sh_tmu_channel, ced);\n }\n@@ -364,8 +373,8 @@ static int sh_tmu_clock_event_set_state(struct clock_event_device *ced,\n \tif (clockevent_state_oneshot(ced) || clockevent_state_periodic(ced))\n \t\tsh_tmu_disable(ch);\n \n-\tdev_info(&ch->tmu->pdev->dev, \"ch%u: used for %s clock events\\n\",\n-\t\t ch->index, periodic ? \"periodic\" : \"oneshot\");\n+\tpr_info(\"%s ch%u: used for %s clock events\\n\",\n+\t\tch->tmu->name, ch->index, periodic ? \"periodic\" : \"oneshot\");\n \tsh_tmu_clock_event_start(ch, periodic);\n \treturn 0;\n }\n@@ -417,20 +426,22 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,\n \tced->set_state_shutdown = sh_tmu_clock_event_shutdown;\n \tced->set_state_periodic = sh_tmu_clock_event_set_periodic;\n \tced->set_state_oneshot = sh_tmu_clock_event_set_oneshot;\n-\tced->suspend = sh_tmu_clock_event_suspend;\n-\tced->resume = sh_tmu_clock_event_resume;\n+\tif (ch->tmu->pdev) {\n+\t\tced->suspend = sh_tmu_clock_event_suspend;\n+\t\tced->resume = sh_tmu_clock_event_resume;\n+\t}\n \n-\tdev_info(&ch->tmu->pdev->dev, \"ch%u: used for clock events\\n\",\n-\t\t ch->index);\n+\tpr_info(\"%s ch%u: used for clock events\\n\",\n+\t\tch->tmu->name, ch->index);\n \n \tclockevents_config_and_register(ced, ch->tmu->rate, 0x300, 0xffffffff);\n \n \tret = request_irq(ch->irq, sh_tmu_interrupt,\n \t\t\t IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,\n-\t\t\t dev_name(&ch->tmu->pdev->dev), ch);\n+\t\t\t ch->tmu->name, ch);\n \tif (ret) {\n-\t\tdev_err(&ch->tmu->pdev->dev, \"ch%u: failed to request irq %d\\n\",\n-\t\t\tch->index, ch->irq);\n+\t\tpr_err(\"%s ch%u: failed to request irq %d\\n\",\n+\t\t ch->tmu->name, ch->index, ch->irq);\n \t\treturn;\n \t}\n }\n@@ -465,28 +476,36 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int index,\n \telse\n \t\tch->base = tmu->mapbase + 8 + ch->index * 12;\n \n-\tch->irq = platform_get_irq(tmu->pdev, index);\n+\tif (tmu->np)\n+\t\tch->irq = of_irq_get(tmu->np, index);\n+\telse if (tmu->pdev)\n+\t\tch->irq = platform_get_irq(tmu->pdev, index);\n+\n \tif (ch->irq < 0)\n \t\treturn ch->irq;\n \n \tch->cs_enabled = false;\n \tch->enable_count = 0;\n \n-\treturn sh_tmu_register(ch, dev_name(&tmu->pdev->dev),\n-\t\t\t clockevent, clocksource);\n+\treturn sh_tmu_register(ch, tmu->name, clockevent, clocksource);\n }\n \n static int sh_tmu_map_memory(struct sh_tmu_device *tmu)\n {\n \tstruct resource *res;\n \n-\tres = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0);\n-\tif (!res) {\n-\t\tdev_err(&tmu->pdev->dev, \"failed to get I/O memory\\n\");\n-\t\treturn -ENXIO;\n+\tif (tmu->pdev) {\n+\t\tres = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0);\n+\t\tif (!res) {\n+\t\t\tpr_err(\"sh_tmu failed to get I/O memory\\n\");\n+\t\t\treturn -ENXIO;\n+\t\t}\n+\n+\t\ttmu->mapbase = ioremap(res->start, resource_size(res));\n \t}\n+\tif (tmu->np)\n+\t\ttmu->mapbase = of_iomap(tmu->np, 0);\n \n-\ttmu->mapbase = ioremap(res->start, resource_size(res));\n \tif (tmu->mapbase == NULL)\n \t\treturn -ENXIO;\n \n@@ -495,53 +514,25 @@ static int sh_tmu_map_memory(struct sh_tmu_device *tmu)\n \n static int sh_tmu_parse_dt(struct sh_tmu_device *tmu)\n {\n-\tstruct device_node *np = tmu->pdev->dev.of_node;\n-\n \ttmu->model = SH_TMU;\n \ttmu->num_channels = 3;\n \n-\tof_property_read_u32(np, \"#renesas,channels\", &tmu->num_channels);\n+\tof_property_read_u32(tmu->np, \"#renesas,channels\", &tmu->num_channels);\n \n \tif (tmu->num_channels != 2 && tmu->num_channels != 3) {\n-\t\tdev_err(&tmu->pdev->dev, \"invalid number of channels %u\\n\",\n-\t\t\ttmu->num_channels);\n+\t\tpr_err(\"%s: invalid number of channels %u\\n\",\n+\t\t tmu->name, tmu->num_channels);\n \t\treturn -EINVAL;\n \t}\n \n \treturn 0;\n }\n \n-static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)\n+static int sh_tmu_setup(struct sh_tmu_device *tmu)\n {\n \tunsigned int i;\n \tint ret;\n \n-\ttmu->pdev = pdev;\n-\n-\traw_spin_lock_init(&tmu->lock);\n-\n-\tif (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {\n-\t\tret = sh_tmu_parse_dt(tmu);\n-\t\tif (ret < 0)\n-\t\t\treturn ret;\n-\t} else if (pdev->dev.platform_data) {\n-\t\tconst struct platform_device_id *id = pdev->id_entry;\n-\t\tstruct sh_timer_config *cfg = pdev->dev.platform_data;\n-\n-\t\ttmu->model = id->driver_data;\n-\t\ttmu->num_channels = hweight8(cfg->channels_mask);\n-\t} else {\n-\t\tdev_err(&tmu->pdev->dev, \"missing platform data\\n\");\n-\t\treturn -ENXIO;\n-\t}\n-\n-\t/* Get hold of clock. */\n-\ttmu->clk = clk_get(&tmu->pdev->dev, \"fck\");\n-\tif (IS_ERR(tmu->clk)) {\n-\t\tdev_err(&tmu->pdev->dev, \"cannot get clock\\n\");\n-\t\treturn PTR_ERR(tmu->clk);\n-\t}\n-\n \tret = clk_prepare(tmu->clk);\n \tif (ret < 0)\n \t\tgoto err_clk_put;\n@@ -557,7 +548,7 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)\n \t/* Map the memory resource. */\n \tret = sh_tmu_map_memory(tmu);\n \tif (ret < 0) {\n-\t\tdev_err(&tmu->pdev->dev, \"failed to remap I/O memory\\n\");\n+\t\tpr_err(\"%s: failed to remap I/O memory\\n\", tmu->name);\n \t\tgoto err_clk_unprepare;\n \t}\n \n@@ -580,8 +571,6 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)\n \t\t\tgoto err_unmap;\n \t}\n \n-\tplatform_set_drvdata(pdev, tmu);\n-\n \treturn 0;\n \n err_unmap:\n@@ -594,6 +583,40 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)\n \treturn ret;\n }\n \n+static int sh_tmu_setup_pdev(struct sh_tmu_device *tmu, struct platform_device *pdev)\n+{\n+\tint ret;\n+\n+\ttmu->pdev = pdev;\n+\n+\traw_spin_lock_init(&tmu->lock);\n+\n+\tif (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {\n+\t\ttmu->np = pdev->dev.of_node;\n+\t\tret = sh_tmu_parse_dt(tmu);\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\t} else if (pdev->dev.platform_data) {\n+\t\tconst struct platform_device_id *id = pdev->id_entry;\n+\t\tstruct sh_timer_config *cfg = pdev->dev.platform_data;\n+\n+\t\ttmu->model = id->driver_data;\n+\t\ttmu->num_channels = hweight8(cfg->channels_mask);\n+\t} else {\n+\t\tdev_err(&tmu->pdev->dev, \"missing platform data\\n\");\n+\t\treturn -ENXIO;\n+\t}\n+\n+\ttmu->name = dev_name(&pdev->dev);\n+\ttmu->clk = clk_get(&tmu->pdev->dev, \"fck\");\n+\tif (IS_ERR(tmu->clk)) {\n+\t\tdev_err(&tmu->pdev->dev, \"cannot get clock\\n\");\n+\t\treturn PTR_ERR(tmu->clk);\n+\t}\n+\n+\treturn sh_tmu_setup(tmu);\n+}\n+\n static int sh_tmu_probe(struct platform_device *pdev)\n {\n \tstruct sh_tmu_device *tmu = platform_get_drvdata(pdev);\n@@ -613,12 +636,13 @@ static int sh_tmu_probe(struct platform_device *pdev)\n \tif (tmu == NULL)\n \t\treturn -ENOMEM;\n \n-\tret = sh_tmu_setup(tmu, pdev);\n+\tret = sh_tmu_setup_pdev(tmu, pdev);\n \tif (ret) {\n \t\tkfree(tmu);\n \t\tpm_runtime_idle(&pdev->dev);\n \t\treturn ret;\n \t}\n+\tplatform_set_drvdata(pdev, tmu);\n \n \tif (is_sh_early_platform_device(pdev))\n \t\treturn 0;\n@@ -632,6 +656,47 @@ static int sh_tmu_probe(struct platform_device *pdev)\n \treturn 0;\n }\n \n+static int sh_tmu_setup_of(struct sh_tmu_device *tmu, struct device_node *np)\n+{\n+\tint ret;\n+\n+\ttmu->np = np;\n+\traw_spin_lock_init(&tmu->lock);\n+\n+\tret = sh_tmu_parse_dt(tmu);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\ttmu->clk = of_clk_get(np, 0);\n+\ttmu->name = of_node_full_name(np);\n+\n+\tif (IS_ERR(tmu->clk)) {\n+\t\tpr_err(\"%pOF: cannot get clock\\n\", np);\n+\t\treturn PTR_ERR(tmu->clk);\n+\t}\n+\n+\treturn sh_tmu_setup(tmu);\n+}\n+\n+static int __init sh_tmu_of_register(struct device_node *np)\n+{\n+\tstruct sh_tmu_device *tmu;\n+\tint ret;\n+\n+\ttmu = kzalloc(sizeof(*tmu), GFP_KERNEL);\n+\tif (tmu == NULL)\n+\t\treturn -ENOMEM;\n+\n+\tret = sh_tmu_setup_of(tmu, np);\n+\tif (ret) {\n+\t\tkfree(tmu);\n+\t\tpr_warn(\"%pOF: Timer register failed (%d)\", np, ret);\n+\t} else\n+\t\tof_node_set_flag(np, OF_POPULATED);\n+\n+\treturn ret;\n+}\n+\n static const struct platform_device_id sh_tmu_id_table[] = {\n \t{ \"sh-tmu\", SH_TMU },\n \t{ \"sh-tmu-sh3\", SH_TMU_SH3 },\n@@ -665,6 +730,7 @@ static void __exit sh_tmu_exit(void)\n \tplatform_driver_unregister(&sh_tmu_device_driver);\n }\n \n+TIMER_OF_DECLARE(sh_tmu, \"renesas,tmu\", sh_tmu_of_register);\n #ifdef CONFIG_SUPERH\n sh_early_platform_init(\"earlytimer\", &sh_tmu_device_driver);\n #endif\n","prefixes":["DO","NOT","MERGE","v8","08/36"]}