{"id":1936125,"url":"http://patchwork.ozlabs.org/api/patches/1936125/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-24-eajames@linux.ibm.com/","project":{"id":57,"url":"http://patchwork.ozlabs.org/api/projects/57/?format=json","name":"Linux ASPEED SoC development","link_name":"linux-aspeed","list_id":"linux-aspeed.lists.ozlabs.org","list_email":"linux-aspeed@lists.ozlabs.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20240516181907.3468796-24-eajames@linux.ibm.com>","list_archive_url":null,"date":"2024-05-16T18:18:50","name":"[v3,23/40] fsi: core: Add interrupt support","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"fc7d680d5c24cb37b57b6aa4635907362cdb70d6","submitter":{"id":74989,"url":"http://patchwork.ozlabs.org/api/people/74989/?format=json","name":"Eddie James","email":"eajames@linux.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-24-eajames@linux.ibm.com/mbox/","series":[{"id":407101,"url":"http://patchwork.ozlabs.org/api/series/407101/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=407101","date":"2024-05-16T18:18:31","name":"fsi: Add interrupt support","version":3,"mbox":"http://patchwork.ozlabs.org/series/407101/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1936125/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1936125/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=DWXSkrhA;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; 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a=rsa-sha256; c=relaxed/relaxed; d=ibm.com;\n h=from : to : cc : subject\n : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding; s=pp1;\n bh=6fcNzPnSu09CP3JPxIcDe7jBDQRdWPyVV7EsX+xEyB0=;\n b=DWXSkrhAWq8WS+gU2owTj1H6eArFkb/idtnIKA5C/PEGu6tjVWgP8EAoeuuvjmoNwG8l\n tQk3f+dDWP5B4QzkxLbAJO9Ug4E95hqAkmrY+y4PsLWsDzR5ZehTc1jATh30yCzolu9E\n DLnoGrVSwhJeGJh43ZBS9VCeXdsSRa+GDcdH3jaHymUmpW14lAlkUyZn9FEhB95FLx7o\n c1srwaHDDYlKS/WOIKjtl756rKBVFn4tuiaAtiNsQqHMc6IvEem3ysGXaEFTh9NstV+F\n OQB+OwF7RJjvJIPUuG1QAvq1PCt4kX04po0EKoO4F/+11JNz5T0nTznMawPVUOGUuXqf zA==","From":"Eddie James ","To":"linux-fsi@lists.ozlabs.org","Subject":"[PATCH v3 23/40] fsi: core: Add interrupt support","Date":"Thu, 16 May 2024 13:18:50 -0500","Message-Id":"<20240516181907.3468796-24-eajames@linux.ibm.com>","X-Mailer":"git-send-email 2.39.3","In-Reply-To":"<20240516181907.3468796-1-eajames@linux.ibm.com>","References":"<20240516181907.3468796-1-eajames@linux.ibm.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-TM-AS-GCONF":"00","X-Proofpoint-GUID":"B0drdVEIYzFF3eT6Qfqye_spNtgHk3t_","X-Proofpoint-ORIG-GUID":"B0drdVEIYzFF3eT6Qfqye_spNtgHk3t_","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26\n definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n clxscore=1015 mlxscore=0\n bulkscore=0 adultscore=0 malwarescore=0 spamscore=0 phishscore=0\n priorityscore=1501 impostorscore=0 mlxlogscore=999 suspectscore=0\n lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1\n engine=8.12.0-2405010000 definitions=main-2405160132","X-BeenThere":"linux-aspeed@lists.ozlabs.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Linux ASPEED SoC development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"andi.shyti@kernel.org, linux-aspeed@lists.ozlabs.org, jk@ozlabs.org,\n alistair@popple.id.au, linux-kernel@vger.kernel.org,\n linux-spi@vger.kernel.org, broonie@kernel.org, andrew@codeconstruct.com.au,\n linux-i2c@vger.kernel.org","Errors-To":"linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"Linux-aspeed\"\n "},"content":"Add an irq chip to the FSI master structure to control slave interrupt\nmasking. Add a function to request an IRQ from the FSI device.\nThe FSI master IRQ mapping is based on the FSI device engine type and\nslave link.\n\nSigned-off-by: Eddie James \n---\nChanges since v2:\n - Remove slave interrupt handler since it's not used yet\n\n drivers/fsi/fsi-core.c | 159 +++++++++++++++++++++++++++++++++++++\n drivers/fsi/fsi-master.h | 9 +++\n include/linux/fsi.h | 2 +\n include/trace/events/fsi.h | 60 ++++++++++++++\n 4 files changed, 230 insertions(+)","diff":"diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c\nindex 8b402149acbe9..ae65d87d4b13e 100644\n--- a/drivers/fsi/fsi-core.c\n+++ b/drivers/fsi/fsi-core.c\n@@ -14,10 +14,12 @@\n #include \n #include \n #include \n+#include \n #include \n #include \n #include \n #include \n+#include \n #include \n #include \n #include \n@@ -109,6 +111,67 @@ int fsi_device_peek(struct fsi_device *dev, void *val)\n \n \treturn fsi_slave_read(dev->slave, addr, val, sizeof(uint32_t));\n }\n+EXPORT_SYMBOL_GPL(fsi_device_peek);\n+\n+static int fsi_request_irq(struct fsi_slave *slave, irq_handler_t handler, void *data,\n+\t\t\t unsigned int engine_irq, struct device *dev)\n+{\n+\tstruct device_node *parent = of_node_get(slave->master->dev.of_node);\n+\tstruct irq_fwspec fwspec;\n+\tunsigned int irq;\n+\n+\t/*\n+\t * FSI devices can only report interrupts to their own master, so if the master\n+\t * isn't an interrupt controller, don't try and map an irq.\n+\t */\n+\tif (!of_get_property(parent, \"#interrupt-cells\", NULL)) {\n+\t\tof_node_put(parent);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tfwspec.fwnode = of_node_to_fwnode(parent);\n+\tfwspec.param_count = 1;\n+\tfwspec.param[0] = engine_irq + (slave->link * FSI_IRQ_COUNT);\n+\tirq = irq_create_fwspec_mapping(&fwspec);\n+\tif (!irq)\n+\t\treturn -EINVAL;\n+\n+\treturn devm_request_irq(dev, irq, handler, 0, dev_name(dev), data);\n+}\n+\n+int fsi_device_request_irq(struct fsi_device *dev, irq_handler_t handler, void *data)\n+{\n+\tunsigned int engine_irq;\n+\n+\tswitch (dev->engine_type) {\n+\tcase 0x4:\t// shift\n+\t\tengine_irq = 1;\n+\t\tbreak;\n+\tcase 0x5:\t// scom\n+\t\tengine_irq = 2;\n+\t\tbreak;\n+\tcase 0x6:\t// scratchpad\n+\t\tengine_irq = 3;\n+\t\tbreak;\n+\tcase 0x7:\t// i2cm\n+\t\tengine_irq = 4;\n+\t\tbreak;\n+\tcase 0x20:\t// mbox\n+\t\tengine_irq = 7;\n+\t\tbreak;\n+\tcase 0x22:\t// sbefifo\n+\t\tengine_irq = 6;\n+\t\tbreak;\n+\tcase 0x23:\t// spim\n+\t\tengine_irq = 5;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn fsi_request_irq(dev->slave, handler, data, engine_irq, &dev->dev);\n+}\n+EXPORT_SYMBOL_GPL(fsi_device_request_irq);\n \n unsigned long fsi_device_local_bus_frequency(struct fsi_device *dev)\n {\n@@ -1467,6 +1530,99 @@ void fsi_master_regmap_config(struct regmap_config *config)\n }\n EXPORT_SYMBOL_GPL(fsi_master_regmap_config);\n \n+int fsi_master_irq(struct fsi_master *master, struct irq_domain *irq_domain, unsigned int link)\n+{\n+\tstruct irq_desc *downstream = irq_resolve_mapping(irq_domain, (link * FSI_IRQ_COUNT) + 8);\n+\tunsigned long size = FSI_SI1S_SLAVE_BIT + 1;\n+\tunsigned long bit = FSI_SI1S_MBOX_BIT;\n+\tunsigned long srsis0 = 0;\n+\tunsigned long srsis4 = 0;\n+\tunsigned long si1s;\n+\t__be32 reg;\n+\tint rc;\n+\n+\trc = fsi_master_read(master, link, 0, FSI_SLAVE_BASE + FSI_SI1S, ®, sizeof(reg));\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tsi1s = (unsigned long)be32_to_cpu(reg);\n+\tfor_each_set_bit_from(bit, &si1s, size)\n+\t\tgeneric_handle_domain_irq(irq_domain, (link * FSI_IRQ_COUNT) + (31 - bit));\n+\n+\tif (downstream) {\n+\t\tint i;\n+\n+\t\tmaster->remote_interrupt_status = 0;\n+\n+\t\trc = fsi_master_read(master, link, 0, FSI_SLAVE_BASE + FSI_SRSIS0, ®,\n+\t\t\t\t sizeof(reg));\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\n+\t\tsrsis0 = (unsigned long)be32_to_cpu(reg);\n+\t\tfor (i = 0; i < 4; ++i) {\n+\t\t\tif (srsis0 & (0xff000000 >> (8 * i)))\n+\t\t\t\tmaster->remote_interrupt_status |= (1 << i);\n+\t\t}\n+\n+\t\trc = fsi_master_read(master, link, 0, FSI_SLAVE_BASE + FSI_SRSIS4, ®,\n+\t\t\t\t sizeof(reg));\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\n+\t\tsrsis4 = (unsigned long)be32_to_cpu(reg);\n+\t\tfor (i = 0; i < 4; ++i) {\n+\t\t\tif (srsis4 & (0xff000000 >> (8 * i)))\n+\t\t\t\tmaster->remote_interrupt_status |= (16 << i);\n+\t\t}\n+\n+\t\tif (master->remote_interrupt_status) {\n+\t\t\thandle_irq_desc(downstream);\n+\n+\t\t\treg = cpu_to_be32(0xffffffff);\n+\t\t\tif (master->remote_interrupt_status & 0xf)\n+\t\t\t\tfsi_master_write(master, link, 0, FSI_SLAVE_BASE + FSI_SRSIC0,\n+\t\t\t\t\t\t ®, sizeof(reg));\n+\n+\t\t\tif (master->remote_interrupt_status & 0xf0)\n+\t\t\t\tfsi_master_write(master, link, 0, FSI_SLAVE_BASE + FSI_SRSIC4,\n+\t\t\t\t\t\t ®, sizeof(reg));\n+\t\t}\n+\t}\n+\n+\ttrace_fsi_master_irq(master, link, si1s, srsis0, srsis4);\n+\treturn 0;\n+}\n+EXPORT_SYMBOL_GPL(fsi_master_irq);\n+\n+static void fsi_master_irq_mask(struct irq_data *data)\n+{\n+\tunsigned int bit = 31 - (data->hwirq % FSI_IRQ_COUNT);\n+\n+\tif (bit >= FSI_SI1S_MBOX_BIT) {\n+\t\tstruct fsi_master *master = irq_data_get_irq_chip_data(data);\n+\t\tint link = data->hwirq / FSI_IRQ_COUNT;\n+\t\t__be32 mask = cpu_to_be32(BIT(bit));\n+\n+\t\ttrace_fsi_master_irq_mask(master, link, data->hwirq % FSI_IRQ_COUNT, true);\n+\t\tfsi_master_write(master, link, 0, FSI_SLAVE_BASE + FSI_SCI1M, &mask, sizeof(mask));\n+\t}\n+}\n+\n+static void fsi_master_irq_unmask(struct irq_data *data)\n+{\n+\tunsigned int bit = 31 - (data->hwirq % FSI_IRQ_COUNT);\n+\n+\tif (bit >= FSI_SI1S_MBOX_BIT) {\n+\t\tstruct fsi_master *master = irq_data_get_irq_chip_data(data);\n+\t\tint link = data->hwirq / FSI_IRQ_COUNT;\n+\t\t__be32 mask = cpu_to_be32(BIT(bit));\n+\n+\t\ttrace_fsi_master_irq_mask(master, link, data->hwirq % FSI_IRQ_COUNT, false);\n+\t\tfsi_master_write(master, link, 0, FSI_SLAVE_BASE + FSI_SSI1M, &mask, sizeof(mask));\n+\t}\n+}\n+\n int fsi_master_register(struct fsi_master *master)\n {\n \tint rc;\n@@ -1491,6 +1647,9 @@ int fsi_master_register(struct fsi_master *master)\n \tif (master->flags & FSI_MASTER_FLAG_SWCLOCK)\n \t\tmaster->clock_frequency = 100000000; // POWER reference clock\n \n+\tmaster->irq_chip.name = dev_name(&master->dev);\n+\tmaster->irq_chip.irq_mask = fsi_master_irq_mask;\n+\tmaster->irq_chip.irq_unmask = fsi_master_irq_unmask;\n \tmaster->dev.class = &fsi_master_class;\n \n \tmutex_lock(&master->scan_lock);\ndiff --git a/drivers/fsi/fsi-master.h b/drivers/fsi/fsi-master.h\nindex 8ea2f69ec4922..2104902091e05 100644\n--- a/drivers/fsi/fsi-master.h\n+++ b/drivers/fsi/fsi-master.h\n@@ -10,6 +10,7 @@\n #define DRIVERS_FSI_MASTER_H\n \n #include \n+#include \n #include \n \n /*\n@@ -112,6 +113,7 @@\n /* Misc */\n #define\tFSI_CRC_SIZE\t\t4\n #define FSI_LINK_ENABLE_SETUP_TIME\t10\t/* in mS */\n+#define FSI_IRQ_COUNT\t\t9\n \n /* fsi-master definition and flags */\n #define FSI_MASTER_FLAG_SWCLOCK\t\t0x1\n@@ -137,6 +139,7 @@ struct fsi_master {\n \tint\t\tn_links;\n \tint\t\tflags;\n \tstruct mutex\tscan_lock;\n+\tstruct irq_chip\tirq_chip;\n \tint\t\t(*read)(struct fsi_master *, int link, uint8_t id,\n \t\t\t\tuint32_t addr, void *val, size_t size);\n \tint\t\t(*write)(struct fsi_master *, int link, uint8_t id,\n@@ -147,6 +150,7 @@ struct fsi_master {\n \t\t\t\t bool enable);\n \tint\t\t(*link_config)(struct fsi_master *, int link,\n \t\t\t\t u8 t_send_delay, u8 t_echo_delay);\n+\tu8\t\tremote_interrupt_status;\n };\n \n #define to_fsi_master(d) container_of(d, struct fsi_master, dev)\n@@ -176,4 +180,9 @@ extern void fsi_master_unregister(struct fsi_master *master);\n \n extern int fsi_master_rescan(struct fsi_master *master);\n \n+struct irq_domain;\n+\n+extern int fsi_master_irq(struct fsi_master *master, struct irq_domain *irq_domain,\n+\t\t\t unsigned int link);\n+\n #endif /* DRIVERS_FSI_MASTER_H */\ndiff --git a/include/linux/fsi.h b/include/linux/fsi.h\nindex e0309bf0ae072..c249a95b7ff84 100644\n--- a/include/linux/fsi.h\n+++ b/include/linux/fsi.h\n@@ -8,6 +8,7 @@\n #define LINUX_FSI_H\n \n #include \n+#include \n \n struct fsi_device {\n \tstruct device\t\tdev;\n@@ -25,6 +26,7 @@ extern int fsi_device_write(struct fsi_device *dev, uint32_t addr,\n \t\tconst void *val, size_t size);\n extern int fsi_device_peek(struct fsi_device *dev, void *val);\n extern unsigned long fsi_device_local_bus_frequency(struct fsi_device *dev);\n+extern int fsi_device_request_irq(struct fsi_device *dev, irq_handler_t handler, void *data);\n \n struct fsi_device_id {\n \tu8\tengine_type;\ndiff --git a/include/trace/events/fsi.h b/include/trace/events/fsi.h\nindex da977d59e163e..0e4d717ee0adb 100644\n--- a/include/trace/events/fsi.h\n+++ b/include/trace/events/fsi.h\n@@ -8,6 +8,47 @@\n \n #include \n \n+TRACE_EVENT(fsi_master_irq,\n+\tTP_PROTO(const struct fsi_master *master, unsigned int link, uint32_t si1s,\n+\t\t uint32_t srsis0, uint32_t srsis4),\n+\tTP_ARGS(master, link, si1s, srsis0, srsis4),\n+\tTP_STRUCT__entry(\n+\t\t__field(int, master_idx)\n+\t\t__field(unsigned int, link)\n+\t\t__field(uint32_t, si1s)\n+\t\t__field(uint32_t, srsis0)\n+\t\t__field(uint32_t, srsis4)\n+\t),\n+\tTP_fast_assign(\n+\t\t__entry->master_idx = master->idx;\n+\t\t__entry->link = link;\n+\t\t__entry->si1s = si1s;\n+\t\t__entry->srsis0 = srsis0;\n+\t\t__entry->srsis4 = srsis4;\n+\t),\n+\tTP_printk(\"fsi%d:%02d si1s:%08x srsis0:%08x srsis4:%08x\", __entry->master_idx,\n+\t\t __entry->link, __entry->si1s, __entry->srsis0, __entry->srsis4)\n+);\n+\n+TRACE_EVENT(fsi_master_irq_mask,\n+\tTP_PROTO(const struct fsi_master *master, unsigned int link, unsigned int bit, bool mask),\n+\tTP_ARGS(master, link, bit, mask),\n+\tTP_STRUCT__entry(\n+\t\t__field(int, master_idx)\n+\t\t__field(unsigned int, link)\n+\t\t__field(unsigned int, bit)\n+\t\t__field(bool, mask)\n+\t),\n+\tTP_fast_assign(\n+\t\t__entry->master_idx = master->idx;\n+\t\t__entry->link = link;\n+\t\t__entry->bit = bit;\n+\t\t__entry->mask = mask;\n+\t),\n+\tTP_printk(\"fsi%d:%02d %s bit:%d\", __entry->master_idx, __entry->link,\n+\t\t __entry->mask ? \"mask\" : \"unmask\", __entry->bit)\n+);\n+\n TRACE_EVENT(fsi_master_xfer,\n \tTP_PROTO(int master_idx, int link, int id, uint32_t addr, size_t size, const void *data,\n \t\t bool read),\n","prefixes":["v3","23/40"]}