{"id":1936100,"url":"http://patchwork.ozlabs.org/api/patches/1936100/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-9-eajames@linux.ibm.com/","project":{"id":57,"url":"http://patchwork.ozlabs.org/api/projects/57/?format=json","name":"Linux ASPEED SoC development","link_name":"linux-aspeed","list_id":"linux-aspeed.lists.ozlabs.org","list_email":"linux-aspeed@lists.ozlabs.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20240516181907.3468796-9-eajames@linux.ibm.com>","list_archive_url":null,"date":"2024-05-16T18:18:35","name":"[v3,08/40] fsi: core: Reset errors instead of clearing interrupts","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b96a60de551de5b5126b4bdc2209af9e9546978a","submitter":{"id":74989,"url":"http://patchwork.ozlabs.org/api/people/74989/?format=json","name":"Eddie James","email":"eajames@linux.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-9-eajames@linux.ibm.com/mbox/","series":[{"id":407101,"url":"http://patchwork.ozlabs.org/api/series/407101/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=407101","date":"2024-05-16T18:18:31","name":"fsi: Add interrupt support","version":3,"mbox":"http://patchwork.ozlabs.org/series/407101/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1936100/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1936100/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail 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b=W2hyvCjOJkT5vCeNZ523rlDuSALQ3RX+Dg4i46pkZSGN46mlN2Y6f9vQwHzOmJbasn6U\n oeXeQnnGX93h1Vbpy7LUC57JfN1gTg9otcVj0xsjR5+qG8awUzTEFyrMHWlHLbke0bdQ\n l4GyJKoaLEbAtLnsHZvUxavo7CXSV/uJN/NoGCy5c2hS3JfiDrWe3DoZWkwJX3t+rvLf\n GSdpBfjXqSrVqFLY50bx3B/MyLGkjZleyA0oSFeXJ0GoDwYgYP3Dv6z0XWaF60F1IxHq\n zOdeaCZTXld49ZNYOIGXfAEQ8QJyMN6vQvRCuKUzsYjVPiePWNt/OujBB/ptTUuBDlG/ WA==","From":"Eddie James <eajames@linux.ibm.com>","To":"linux-fsi@lists.ozlabs.org","Subject":"[PATCH v3 08/40] fsi: core: Reset errors instead of clearing\n interrupts","Date":"Thu, 16 May 2024 13:18:35 -0500","Message-Id":"<20240516181907.3468796-9-eajames@linux.ibm.com>","X-Mailer":"git-send-email 2.39.3","In-Reply-To":"<20240516181907.3468796-1-eajames@linux.ibm.com>","References":"<20240516181907.3468796-1-eajames@linux.ibm.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-TM-AS-GCONF":"00","X-Proofpoint-GUID":"OeLpiFkQuiAjXgMzGoRM9L88eQWvf1vM","X-Proofpoint-ORIG-GUID":"OeLpiFkQuiAjXgMzGoRM9L88eQWvf1vM","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26\n definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n clxscore=1015 mlxscore=0\n bulkscore=0 adultscore=0 malwarescore=0 spamscore=0 phishscore=0\n priorityscore=1501 impostorscore=0 mlxlogscore=999 suspectscore=0\n lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1\n engine=8.12.0-2405010000 definitions=main-2405160132","X-BeenThere":"linux-aspeed@lists.ozlabs.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Linux ASPEED SoC development <linux-aspeed.lists.ozlabs.org>","List-Unsubscribe":"<https://lists.ozlabs.org/options/linux-aspeed>,\n <mailto:linux-aspeed-request@lists.ozlabs.org?subject=unsubscribe>","List-Archive":"<http://lists.ozlabs.org/pipermail/linux-aspeed/>","List-Post":"<mailto:linux-aspeed@lists.ozlabs.org>","List-Help":"<mailto:linux-aspeed-request@lists.ozlabs.org?subject=help>","List-Subscribe":"<https://lists.ozlabs.org/listinfo/linux-aspeed>,\n <mailto:linux-aspeed-request@lists.ozlabs.org?subject=subscribe>","Cc":"andi.shyti@kernel.org, linux-aspeed@lists.ozlabs.org, jk@ozlabs.org,\n alistair@popple.id.au, linux-kernel@vger.kernel.org,\n linux-spi@vger.kernel.org, broonie@kernel.org, andrew@codeconstruct.com.au,\n linux-i2c@vger.kernel.org","Errors-To":"linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"Linux-aspeed\"\n <linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>"},"content":"The proper way to clear error conditions is to use the SRES\nregister rather than simple clearing SISC.\n\nSigned-off-by: Eddie James <eajames@linux.ibm.com>\n---\n drivers/fsi/fsi-core.c  | 9 +++++----\n drivers/fsi/fsi-slave.h | 6 ++++++\n 2 files changed, 11 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c\nindex 93bbdcf50a89a..ce9762d1bd8b0 100644\n--- a/drivers/fsi/fsi-core.c\n+++ b/drivers/fsi/fsi-core.c\n@@ -166,7 +166,7 @@ static int fsi_slave_calc_addr(struct fsi_slave *slave, uint32_t *addrp,\n static int fsi_slave_report_and_clear_errors(struct fsi_slave *slave)\n {\n \tstruct fsi_master *master = slave->master;\n-\t__be32 irq, stat;\n+\t__be32 irq, reset, stat;\n \tint rc, link;\n \tuint8_t id;\n \n@@ -187,9 +187,10 @@ static int fsi_slave_report_and_clear_errors(struct fsi_slave *slave)\n \t\t\tbe32_to_cpu(stat), be32_to_cpu(irq));\n \ttrace_fsi_slave_error(slave, be32_to_cpu(irq), be32_to_cpu(stat));\n \n-\t/* clear interrupts */\n-\treturn fsi_master_write(master, link, id, FSI_SLAVE_BASE + FSI_SISC,\n-\t\t\t&irq, sizeof(irq));\n+\t/* reset errors */\n+\treset = cpu_to_be32(FSI_SRES_ERRS);\n+\treturn fsi_master_write(master, link, id, FSI_SLAVE_BASE + FSI_SRES, &reset,\n+\t\t\t\tsizeof(reset));\n }\n \n /* Encode slave local bus echo delay */\ndiff --git a/drivers/fsi/fsi-slave.h b/drivers/fsi/fsi-slave.h\nindex fabc0b66d5bf3..e9fd4be6f3760 100644\n--- a/drivers/fsi/fsi-slave.h\n+++ b/drivers/fsi/fsi-slave.h\n@@ -24,6 +24,7 @@\n #define FSI_SSI1M\t\t0x1c\t/* S  : Set slave interrupt 1 mask */\n #define FSI_SCI1M\t\t0x20\t/* C  : Clear slave interrupt 1 mask */\n #define FSI_SLBUS\t\t0x30\t/* W  : LBUS Ownership */\n+#define FSI_SRES\t\t0x34\t/* W  : Reset */\n #define FSI_SRSIC0\t\t0x68\t/* C  : Clear remote interrupt condition */\n #define FSI_SRSIC4\t\t0x6c\t/* C  : Clear remote interrupt condition */\n #define FSI_SRSIM0\t\t0x70\t/* R/W: Remote interrupt mask */\n@@ -90,6 +91,11 @@\n  */\n #define FSI_SLBUS_FORCE\t\t0x80000000\t/* Force LBUS ownership */\n \n+/*\n+ * SRES fields\n+ */\n+#define FSI_SRES_ERRS\t\t0x40000000\t/* Reset FSI slave errors */\n+\n /*\n  * LLMODE fields\n  */\n","prefixes":["v3","08/40"]}