{"id":1936098,"url":"http://patchwork.ozlabs.org/api/patches/1936098/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-3-eajames@linux.ibm.com/","project":{"id":57,"url":"http://patchwork.ozlabs.org/api/projects/57/?format=json","name":"Linux ASPEED SoC development","link_name":"linux-aspeed","list_id":"linux-aspeed.lists.ozlabs.org","list_email":"linux-aspeed@lists.ozlabs.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20240516181907.3468796-3-eajames@linux.ibm.com>","list_archive_url":null,"date":"2024-05-16T18:18:29","name":"[v3,02/40] fsi: Move slave definitions to fsi-slave.h","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f35ac9ea430a87be222e44b4224d711c5e6bb164","submitter":{"id":74989,"url":"http://patchwork.ozlabs.org/api/people/74989/?format=json","name":"Eddie James","email":"eajames@linux.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-3-eajames@linux.ibm.com/mbox/","series":[{"id":407101,"url":"http://patchwork.ozlabs.org/api/series/407101/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=407101","date":"2024-05-16T18:18:31","name":"fsi: Add interrupt support","version":3,"mbox":"http://patchwork.ozlabs.org/series/407101/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1936098/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1936098/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) 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clxscore=1015 bulkscore=0\n malwarescore=0 priorityscore=1501 mlxscore=0 phishscore=0 suspectscore=0\n mlxlogscore=999 adultscore=0 lowpriorityscore=0 impostorscore=0\n spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1\n engine=8.12.0-2405010000 definitions=main-2405160132","X-BeenThere":"linux-aspeed@lists.ozlabs.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Linux ASPEED SoC development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"andi.shyti@kernel.org, linux-aspeed@lists.ozlabs.org, jk@ozlabs.org,\n alistair@popple.id.au, linux-kernel@vger.kernel.org,\n linux-spi@vger.kernel.org, broonie@kernel.org, andrew@codeconstruct.com.au,\n linux-i2c@vger.kernel.org","Errors-To":"linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"Linux-aspeed\"\n "},"content":"Master drivers may need access to the slave definitions.\n\nSigned-off-by: Eddie James \n---\n drivers/fsi/fsi-core.c | 35 -----------------\n drivers/fsi/fsi-slave.h | 84 +++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 84 insertions(+), 35 deletions(-)","diff":"diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c\nindex 097d5a780264c..7bf0c96fc0172 100644\n--- a/drivers/fsi/fsi-core.c\n+++ b/drivers/fsi/fsi-core.c\n@@ -45,41 +45,6 @@\n \n static const int engine_page_size = 0x400;\n \n-#define FSI_SLAVE_BASE\t\t\t0x800\n-\n-/*\n- * FSI slave engine control register offsets\n- */\n-#define FSI_SMODE\t\t0x0\t/* R/W: Mode register */\n-#define FSI_SISC\t\t0x8\t/* R/W: Interrupt condition */\n-#define FSI_SSTAT\t\t0x14\t/* R : Slave status */\n-#define FSI_SLBUS\t\t0x30\t/* W : LBUS Ownership */\n-#define FSI_LLMODE\t\t0x100\t/* R/W: Link layer mode register */\n-\n-/*\n- * SMODE fields\n- */\n-#define FSI_SMODE_WSC\t\t0x80000000\t/* Warm start done */\n-#define FSI_SMODE_ECRC\t\t0x20000000\t/* Hw CRC check */\n-#define FSI_SMODE_SID_SHIFT\t24\t\t/* ID shift */\n-#define FSI_SMODE_SID_MASK\t3\t\t/* ID Mask */\n-#define FSI_SMODE_ED_SHIFT\t20\t\t/* Echo delay shift */\n-#define FSI_SMODE_ED_MASK\t0xf\t\t/* Echo delay mask */\n-#define FSI_SMODE_SD_SHIFT\t16\t\t/* Send delay shift */\n-#define FSI_SMODE_SD_MASK\t0xf\t\t/* Send delay mask */\n-#define FSI_SMODE_LBCRR_SHIFT\t8\t\t/* Clk ratio shift */\n-#define FSI_SMODE_LBCRR_MASK\t0xf\t\t/* Clk ratio mask */\n-\n-/*\n- * SLBUS fields\n- */\n-#define FSI_SLBUS_FORCE\t\t0x80000000\t/* Force LBUS ownership */\n-\n-/*\n- * LLMODE fields\n- */\n-#define FSI_LLMODE_ASYNC\t0x1\n-\n #define FSI_SLAVE_SIZE_23b\t\t0x800000\n \n static DEFINE_IDA(master_ida);\ndiff --git a/drivers/fsi/fsi-slave.h b/drivers/fsi/fsi-slave.h\nindex 1d63a585829dd..dba65bd4e083f 100644\n--- a/drivers/fsi/fsi-slave.h\n+++ b/drivers/fsi/fsi-slave.h\n@@ -7,6 +7,90 @@\n #include \n #include \n \n+#define FSI_SLAVE_BASE\t\t\t0x800\n+\n+/*\n+ * FSI slave engine control register offsets\n+ */\n+#define FSI_SMODE\t\t0x0\t/* R/W: Mode register */\n+#define FSI_SISC\t\t0x8\t/* R : Interrupt condition */\n+#define FSI_SCISC\t\t0x8\t/* C : Clear interrupt condition */\n+#define FSI_SISM\t\t0xc\t/* R/W: Interrupt mask */\n+#define FSI_SISS\t\t0x10\t/* R : Interrupt status */\n+#define FSI_SSISM\t\t0x10\t/* S : Set interrupt mask */\n+#define FSI_SCISM\t\t0x14\t/* C : Clear interrupt mask */\n+#define FSI_SSTAT\t\t0x14\t/* R : Slave status */\n+#define FSI_SI1S\t\t0x1c\t/* R : Slave interrupt 1 status */\n+#define FSI_SSI1M\t\t0x1c\t/* S : Set slave interrupt 1 mask */\n+#define FSI_SCI1M\t\t0x20\t/* C : Clear slave interrupt 1 mask */\n+#define FSI_SLBUS\t\t0x30\t/* W : LBUS Ownership */\n+#define FSI_SRSIC0\t\t0x68\t/* C : Clear remote interrupt condition */\n+#define FSI_SRSIC4\t\t0x6c\t/* C : Clear remote interrupt condition */\n+#define FSI_SRSIM0\t\t0x70\t/* R/W: Remote interrupt mask */\n+#define FSI_SRSIM4\t\t0x74\t/* R/W: Remote interrupt mask */\n+#define FSI_SRSIS0\t\t0x78\t/* R : Remote interrupt status */\n+#define FSI_SRSIS4\t\t0x7c\t/* R : Remote interrupt status */\n+#define FSI_LLMODE\t\t0x100\t/* R/W: Link layer mode register */\n+\n+/*\n+ * SMODE fields\n+ */\n+#define FSI_SMODE_WSC\t\t0x80000000\t/* Warm start done */\n+#define FSI_SMODE_ECRC\t\t0x20000000\t/* Hw CRC check */\n+#define FSI_SMODE_SID_SHIFT\t24\t\t/* ID shift */\n+#define FSI_SMODE_SID_MASK\t3\t\t/* ID Mask */\n+#define FSI_SMODE_ED_SHIFT\t20\t\t/* Echo delay shift */\n+#define FSI_SMODE_ED_MASK\t0xf\t\t/* Echo delay mask */\n+#define FSI_SMODE_SD_SHIFT\t16\t\t/* Send delay shift */\n+#define FSI_SMODE_SD_MASK\t0xf\t\t/* Send delay mask */\n+#define FSI_SMODE_LBCRR_SHIFT\t8\t\t/* Clk ratio shift */\n+#define FSI_SMODE_LBCRR_MASK\t0xf\t\t/* Clk ratio mask */\n+\n+/*\n+ * SISS fields\n+ */\n+#define FSI_SISS_CRC_ERROR\t\tBIT(31)\n+#define FSI_SISS_PROTO_ERROR\t\tBIT(30)\n+#define FSI_SISS_LBUS_PARITY_ERROR\tBIT(29)\n+#define FSI_SISS_LBUS_PROTO_ERROR\tBIT(28)\n+#define FSI_SISS_ACCESS_ERROR\t\tBIT(27)\n+#define FSI_SISS_LBUS_OWNERSHIP_ERROR\tBIT(26)\n+#define FSI_SISS_LBUS_OWNERSHIP_CHANGE\tBIT(25)\n+#define FSI_SISS_ASYNC_MODE_ERROR\tBIT(14)\n+#define FSI_SISS_OPB_ACCESS_ERROR\tBIT(13)\n+#define FSI_SISS_OPB_FENCED\t\tBIT(12)\n+#define FSI_SISS_OPB_PARITY_ERROR\tBIT(11)\n+#define FSI_SISS_OPB_PROTO_ERROR\tBIT(10)\n+#define FSI_SISS_OPB_TIMEOUT\t\tBIT(9)\n+#define FSI_SISS_OPB_ERROR_ACK\t\tBIT(8)\n+#define FSI_SISS_MFSI_MASTER_ERROR\tBIT(3)\n+#define FSI_SISS_MFSI_PORT_ERROR\tBIT(2)\n+#define FSI_SISS_MFSI_HP\t\tBIT(1)\n+#define FSI_SISS_MFSI_CR_PARITY_ERROR\tBIT(0)\n+#define FSI_SISS_ALL\t\t\t0xfe007f00\n+\n+/*\n+ * SI1S fields\n+ */\n+#define FSI_SI1S_SLAVE_BIT\t31\n+#define FSI_SI1S_SHIFT_BIT\t30\n+#define FSI_SI1S_SCOM_BIT\t29\n+#define FSI_SI1S_SCRATCH_BIT\t28\n+#define FSI_SI1S_I2C_BIT\t27\n+#define FSI_SI1S_SPI_BIT\t26\n+#define FSI_SI1S_SBEFIFO_BIT\t25\n+#define FSI_SI1S_MBOX_BIT\t24\n+\n+/*\n+ * SLBUS fields\n+ */\n+#define FSI_SLBUS_FORCE\t\t0x80000000\t/* Force LBUS ownership */\n+\n+/*\n+ * LLMODE fields\n+ */\n+#define FSI_LLMODE_ASYNC\t0x1\n+\n struct fsi_master;\n \n struct fsi_slave {\n","prefixes":["v3","02/40"]}