{"id":1882096,"url":"http://patchwork.ozlabs.org/api/patches/1882096/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20240103173349.398526-30-alex.bennee@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20240103173349.398526-30-alex.bennee@linaro.org>","list_archive_url":null,"date":"2024-01-03T17:33:35","name":"[v2,29/43] gdbstub: Use GDBFeature for gdb_register_coprocessor","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"13f552597a426dfb1eecf0a79de9316d95e138a6","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/?format=json","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20240103173349.398526-30-alex.bennee@linaro.org/mbox/","series":[{"id":388742,"url":"http://patchwork.ozlabs.org/api/series/388742/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=388742","date":"2024-01-03T17:33:08","name":"testing and plugin updates for 9.0 (pre-PR)","version":2,"mbox":"http://patchwork.ozlabs.org/series/388742/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1882096/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1882096/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=lggtbI4U;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Iglesias\" ,\n Eduardo Habkost ,\n Pierrick Bouvier , qemu-riscv@nongnu.org,\n Alistair Francis ,\n Akihiko Odaki ","Subject":"[PATCH v2 29/43] gdbstub: Use GDBFeature for gdb_register_coprocessor","Date":"Wed, 3 Jan 2024 17:33:35 +0000","Message-Id":"<20240103173349.398526-30-alex.bennee@linaro.org>","X-Mailer":"git-send-email 2.39.2","In-Reply-To":"<20240103173349.398526-1-alex.bennee@linaro.org>","References":"<20240103173349.398526-1-alex.bennee@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::333;\n envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x333.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Akihiko Odaki \n\nThis is a tree-wide change to introduce GDBFeature parameter to\ngdb_register_coprocessor(). The new parameter just replaces num_regs\nand xml parameters for now. GDBFeature will be utilized to simplify XML\nlookup in a following change.\n\nSigned-off-by: Akihiko Odaki \nAcked-by: Alex Bennée \nMessage-Id: <20231213-gdb-v17-4-777047380591@daynix.com>\nSigned-off-by: Alex Bennée \n---\n include/exec/gdbstub.h | 2 +-\n gdbstub/gdbstub.c | 13 +++++++------\n target/arm/gdbstub.c | 35 +++++++++++++++++++----------------\n target/hexagon/cpu.c | 3 +--\n target/loongarch/gdbstub.c | 2 +-\n target/m68k/helper.c | 6 +++---\n target/microblaze/cpu.c | 5 +++--\n target/ppc/gdbstub.c | 11 ++++++-----\n target/riscv/gdbstub.c | 20 ++++++++++++--------\n target/s390x/gdbstub.c | 28 +++++++---------------------\n 10 files changed, 60 insertions(+), 65 deletions(-)","diff":"diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h\nindex d8a3c56fa2b..ac6fce99a64 100644\n--- a/include/exec/gdbstub.h\n+++ b/include/exec/gdbstub.h\n@@ -38,7 +38,7 @@ typedef int (*gdb_set_reg_cb)(CPUArchState *env, uint8_t *buf, int reg);\n */\n void gdb_register_coprocessor(CPUState *cpu,\n gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg,\n- int num_regs, const char *xml, int g_pos);\n+ const GDBFeature *feature, int g_pos);\n \n /**\n * gdbserver_start: start the gdb server\ndiff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c\nindex 46d752bbc2c..068180c83c7 100644\n--- a/gdbstub/gdbstub.c\n+++ b/gdbstub/gdbstub.c\n@@ -544,7 +544,7 @@ static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg)\n \n void gdb_register_coprocessor(CPUState *cpu,\n gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg,\n- int num_regs, const char *xml, int g_pos)\n+ const GDBFeature *feature, int g_pos)\n {\n GDBRegisterState *s;\n guint i;\n@@ -553,7 +553,7 @@ void gdb_register_coprocessor(CPUState *cpu,\n for (i = 0; i < cpu->gdb_regs->len; i++) {\n /* Check for duplicates. */\n s = &g_array_index(cpu->gdb_regs, GDBRegisterState, i);\n- if (strcmp(s->xml, xml) == 0) {\n+ if (strcmp(s->xml, feature->xmlname) == 0) {\n return;\n }\n }\n@@ -565,17 +565,18 @@ void gdb_register_coprocessor(CPUState *cpu,\n g_array_set_size(cpu->gdb_regs, i + 1);\n s = &g_array_index(cpu->gdb_regs, GDBRegisterState, i);\n s->base_reg = cpu->gdb_num_regs;\n- s->num_regs = num_regs;\n+ s->num_regs = feature->num_regs;\n s->get_reg = get_reg;\n s->set_reg = set_reg;\n- s->xml = xml;\n+ s->xml = feature->xml;\n \n /* Add to end of list. */\n- cpu->gdb_num_regs += num_regs;\n+ cpu->gdb_num_regs += feature->num_regs;\n if (g_pos) {\n if (g_pos != s->base_reg) {\n error_report(\"Error: Bad gdb register numbering for '%s', \"\n- \"expected %d got %d\", xml, g_pos, s->base_reg);\n+ \"expected %d got %d\", feature->xml,\n+ g_pos, s->base_reg);\n } else {\n cpu->gdb_num_g_regs = cpu->gdb_num_regs;\n }\ndiff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c\nindex 5949adfb31a..f2b201d3125 100644\n--- a/target/arm/gdbstub.c\n+++ b/target/arm/gdbstub.c\n@@ -483,14 +483,14 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)\n */\n #ifdef TARGET_AARCH64\n if (isar_feature_aa64_sve(&cpu->isar)) {\n- int nreg = arm_gen_dynamic_svereg_feature(cs, cs->gdb_num_regs)->num_regs;\n+ GDBFeature *feature = arm_gen_dynamic_svereg_feature(cs, cs->gdb_num_regs);\n gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg,\n- aarch64_gdb_set_sve_reg, nreg,\n- \"sve-registers.xml\", 0);\n+ aarch64_gdb_set_sve_reg, feature, 0);\n } else {\n gdb_register_coprocessor(cs, aarch64_gdb_get_fpu_reg,\n aarch64_gdb_set_fpu_reg,\n- 34, \"aarch64-fpu.xml\", 0);\n+ gdb_find_static_feature(\"aarch64-fpu.xml\"),\n+ 0);\n }\n /*\n * Note that we report pauth information via the feature name\n@@ -501,19 +501,22 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)\n if (isar_feature_aa64_pauth(&cpu->isar)) {\n gdb_register_coprocessor(cs, aarch64_gdb_get_pauth_reg,\n aarch64_gdb_set_pauth_reg,\n- 4, \"aarch64-pauth.xml\", 0);\n+ gdb_find_static_feature(\"aarch64-pauth.xml\"),\n+ 0);\n }\n #endif\n } else {\n if (arm_feature(env, ARM_FEATURE_NEON)) {\n gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,\n- 49, \"arm-neon.xml\", 0);\n+ gdb_find_static_feature(\"arm-neon.xml\"),\n+ 0);\n } else if (cpu_isar_feature(aa32_simd_r32, cpu)) {\n gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,\n- 33, \"arm-vfp3.xml\", 0);\n+ gdb_find_static_feature(\"arm-vfp3.xml\"),\n+ 0);\n } else if (cpu_isar_feature(aa32_vfp_simd, cpu)) {\n gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,\n- 17, \"arm-vfp.xml\", 0);\n+ gdb_find_static_feature(\"arm-vfp.xml\"), 0);\n }\n if (!arm_feature(env, ARM_FEATURE_M)) {\n /*\n@@ -521,29 +524,29 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)\n * expose to gdb.\n */\n gdb_register_coprocessor(cs, vfp_gdb_get_sysreg, vfp_gdb_set_sysreg,\n- 2, \"arm-vfp-sysregs.xml\", 0);\n+ gdb_find_static_feature(\"arm-vfp-sysregs.xml\"),\n+ 0);\n }\n }\n if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) {\n gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg,\n- 1, \"arm-m-profile-mve.xml\", 0);\n+ gdb_find_static_feature(\"arm-m-profile-mve.xml\"),\n+ 0);\n }\n gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg,\n- arm_gen_dynamic_sysreg_feature(cs, cs->gdb_num_regs)->num_regs,\n- \"system-registers.xml\", 0);\n+ arm_gen_dynamic_sysreg_feature(cs, cs->gdb_num_regs),\n+ 0);\n \n #ifdef CONFIG_TCG\n if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) {\n gdb_register_coprocessor(cs,\n arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg,\n- arm_gen_dynamic_m_systemreg_feature(cs, cs->gdb_num_regs)->num_regs,\n- \"arm-m-system.xml\", 0);\n+ arm_gen_dynamic_m_systemreg_feature(cs, cs->gdb_num_regs), 0);\n #ifndef CONFIG_USER_ONLY\n if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {\n gdb_register_coprocessor(cs,\n arm_gdb_get_m_secextreg, arm_gdb_set_m_secextreg,\n- arm_gen_dynamic_m_secextreg_feature(cs, cs->gdb_num_regs)->num_regs,\n- \"arm-m-secext.xml\", 0);\n+ arm_gen_dynamic_m_secextreg_feature(cs, cs->gdb_num_regs), 0);\n }\n #endif\n }\ndiff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c\nindex 9d1ffc3b4bb..65ac9c75ad0 100644\n--- a/target/hexagon/cpu.c\n+++ b/target/hexagon/cpu.c\n@@ -341,8 +341,7 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp)\n \n gdb_register_coprocessor(cs, hexagon_hvx_gdb_read_register,\n hexagon_hvx_gdb_write_register,\n- NUM_VREGS + NUM_QREGS,\n- \"hexagon-hvx.xml\", 0);\n+ gdb_find_static_feature(\"hexagon-hvx.xml\"), 0);\n \n qemu_init_vcpu(cs);\n cpu_reset(cs);\ndiff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c\nindex 5fc2f19e965..843a869450e 100644\n--- a/target/loongarch/gdbstub.c\n+++ b/target/loongarch/gdbstub.c\n@@ -118,5 +118,5 @@ static int loongarch_gdb_set_fpu(CPULoongArchState *env,\n void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs)\n {\n gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu,\n- 41, \"loongarch-fpu.xml\", 0);\n+ gdb_find_static_feature(\"loongarch-fpu.xml\"), 0);\n }\ndiff --git a/target/m68k/helper.c b/target/m68k/helper.c\nindex 0a1544cd68d..675f2dcd5ad 100644\n--- a/target/m68k/helper.c\n+++ b/target/m68k/helper.c\n@@ -152,10 +152,10 @@ void m68k_cpu_init_gdb(M68kCPU *cpu)\n \n if (m68k_feature(env, M68K_FEATURE_CF_FPU)) {\n gdb_register_coprocessor(cs, cf_fpu_gdb_get_reg, cf_fpu_gdb_set_reg,\n- 11, \"cf-fp.xml\", 18);\n+ gdb_find_static_feature(\"cf-fp.xml\"), 18);\n } else if (m68k_feature(env, M68K_FEATURE_FPU)) {\n- gdb_register_coprocessor(cs, m68k_fpu_gdb_get_reg,\n- m68k_fpu_gdb_set_reg, 11, \"m68k-fp.xml\", 18);\n+ gdb_register_coprocessor(cs, m68k_fpu_gdb_get_reg, m68k_fpu_gdb_set_reg,\n+ gdb_find_static_feature(\"m68k-fp.xml\"), 18);\n }\n /* TODO: Add [E]MAC registers. */\n }\ndiff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c\nindex bbb3335cadd..1998f69828f 100644\n--- a/target/microblaze/cpu.c\n+++ b/target/microblaze/cpu.c\n@@ -297,8 +297,9 @@ static void mb_cpu_initfn(Object *obj)\n CPUMBState *env = &cpu->env;\n \n gdb_register_coprocessor(CPU(cpu), mb_cpu_gdb_read_stack_protect,\n- mb_cpu_gdb_write_stack_protect, 2,\n- \"microblaze-stack-protect.xml\", 0);\n+ mb_cpu_gdb_write_stack_protect,\n+ gdb_find_static_feature(\"microblaze-stack-protect.xml\"),\n+ 0);\n \n set_float_rounding_mode(float_round_nearest_even, &env->fp_status);\n \ndiff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c\nindex e3be3dbd109..09b852464f3 100644\n--- a/target/ppc/gdbstub.c\n+++ b/target/ppc/gdbstub.c\n@@ -570,23 +570,24 @@ void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *pcc)\n {\n if (pcc->insns_flags & PPC_FLOAT) {\n gdb_register_coprocessor(cs, gdb_get_float_reg, gdb_set_float_reg,\n- 33, \"power-fpu.xml\", 0);\n+ gdb_find_static_feature(\"power-fpu.xml\"), 0);\n }\n if (pcc->insns_flags & PPC_ALTIVEC) {\n gdb_register_coprocessor(cs, gdb_get_avr_reg, gdb_set_avr_reg,\n- 34, \"power-altivec.xml\", 0);\n+ gdb_find_static_feature(\"power-altivec.xml\"),\n+ 0);\n }\n if (pcc->insns_flags & PPC_SPE) {\n gdb_register_coprocessor(cs, gdb_get_spe_reg, gdb_set_spe_reg,\n- 34, \"power-spe.xml\", 0);\n+ gdb_find_static_feature(\"power-spe.xml\"), 0);\n }\n if (pcc->insns_flags2 & PPC2_VSX) {\n gdb_register_coprocessor(cs, gdb_get_vsx_reg, gdb_set_vsx_reg,\n- 32, \"power-vsx.xml\", 0);\n+ gdb_find_static_feature(\"power-vsx.xml\"), 0);\n }\n #ifndef CONFIG_USER_ONLY\n gdb_gen_spr_feature(cs);\n gdb_register_coprocessor(cs, gdb_get_spr_reg, gdb_set_spr_reg,\n- pcc->gdb_spr.num_regs, \"power-spr.xml\", 0);\n+ &pcc->gdb_spr, 0);\n #endif\n }\ndiff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c\nindex 76b72a95954..a879869fa1a 100644\n--- a/target/riscv/gdbstub.c\n+++ b/target/riscv/gdbstub.c\n@@ -311,28 +311,32 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs)\n CPURISCVState *env = &cpu->env;\n if (env->misa_ext & RVD) {\n gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu,\n- 32, \"riscv-64bit-fpu.xml\", 0);\n+ gdb_find_static_feature(\"riscv-64bit-fpu.xml\"),\n+ 0);\n } else if (env->misa_ext & RVF) {\n gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu,\n- 32, \"riscv-32bit-fpu.xml\", 0);\n+ gdb_find_static_feature(\"riscv-32bit-fpu.xml\"),\n+ 0);\n }\n if (env->misa_ext & RVV) {\n gdb_register_coprocessor(cs, riscv_gdb_get_vector,\n riscv_gdb_set_vector,\n- ricsv_gen_dynamic_vector_feature(cs, cs->gdb_num_regs)->num_regs,\n- \"riscv-vector.xml\", 0);\n+ ricsv_gen_dynamic_vector_feature(cs, cs->gdb_num_regs),\n+ 0);\n }\n switch (mcc->misa_mxl_max) {\n case MXL_RV32:\n gdb_register_coprocessor(cs, riscv_gdb_get_virtual,\n riscv_gdb_set_virtual,\n- 1, \"riscv-32bit-virtual.xml\", 0);\n+ gdb_find_static_feature(\"riscv-32bit-virtual.xml\"),\n+ 0);\n break;\n case MXL_RV64:\n case MXL_RV128:\n gdb_register_coprocessor(cs, riscv_gdb_get_virtual,\n riscv_gdb_set_virtual,\n- 1, \"riscv-64bit-virtual.xml\", 0);\n+ gdb_find_static_feature(\"riscv-64bit-virtual.xml\"),\n+ 0);\n break;\n default:\n g_assert_not_reached();\n@@ -340,7 +344,7 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs)\n \n if (cpu->cfg.ext_zicsr) {\n gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr,\n- riscv_gen_dynamic_csr_feature(cs, cs->gdb_num_regs)->num_regs,\n- \"riscv-csr.xml\", 0);\n+ riscv_gen_dynamic_csr_feature(cs, cs->gdb_num_regs),\n+ 0);\n }\n }\ndiff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c\nindex 6fbfd41bc86..02c388dc323 100644\n--- a/target/s390x/gdbstub.c\n+++ b/target/s390x/gdbstub.c\n@@ -69,8 +69,6 @@ int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)\n /* the values represent the positions in s390-acr.xml */\n #define S390_A0_REGNUM 0\n #define S390_A15_REGNUM 15\n-/* total number of registers in s390-acr.xml */\n-#define S390_NUM_AC_REGS 16\n \n static int cpu_read_ac_reg(CPUS390XState *env, GByteArray *buf, int n)\n {\n@@ -98,8 +96,6 @@ static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)\n #define S390_FPC_REGNUM 0\n #define S390_F0_REGNUM 1\n #define S390_F15_REGNUM 16\n-/* total number of registers in s390-fpr.xml */\n-#define S390_NUM_FP_REGS 17\n \n static int cpu_read_fp_reg(CPUS390XState *env, GByteArray *buf, int n)\n {\n@@ -132,8 +128,6 @@ static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)\n #define S390_V15L_REGNUM 15\n #define S390_V16_REGNUM 16\n #define S390_V31_REGNUM 31\n-/* total number of registers in s390-vx.xml */\n-#define S390_NUM_VREGS 32\n \n static int cpu_read_vreg(CPUS390XState *env, GByteArray *buf, int n)\n {\n@@ -172,8 +166,6 @@ static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)\n /* the values represent the positions in s390-cr.xml */\n #define S390_C0_REGNUM 0\n #define S390_C15_REGNUM 15\n-/* total number of registers in s390-cr.xml */\n-#define S390_NUM_C_REGS 16\n \n #ifndef CONFIG_USER_ONLY\n static int cpu_read_c_reg(CPUS390XState *env, GByteArray *buf, int n)\n@@ -206,8 +198,6 @@ static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)\n #define S390_VIRT_CPUTM_REGNUM 1\n #define S390_VIRT_BEA_REGNUM 2\n #define S390_VIRT_PREFIX_REGNUM 3\n-/* total number of registers in s390-virt.xml */\n-#define S390_NUM_VIRT_REGS 4\n \n static int cpu_read_virt_reg(CPUS390XState *env, GByteArray *mem_buf, int n)\n {\n@@ -254,8 +244,6 @@ static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)\n #define S390_VIRT_KVM_PFT_REGNUM 1\n #define S390_VIRT_KVM_PFS_REGNUM 2\n #define S390_VIRT_KVM_PFC_REGNUM 3\n-/* total number of registers in s390-virt-kvm.xml */\n-#define S390_NUM_VIRT_KVM_REGS 4\n \n static int cpu_read_virt_kvm_reg(CPUS390XState *env, GByteArray *mem_buf, int n)\n {\n@@ -303,8 +291,6 @@ static int cpu_write_virt_kvm_reg(CPUS390XState *env, uint8_t *mem_buf, int n)\n #define S390_GS_GSD_REGNUM 1\n #define S390_GS_GSSM_REGNUM 2\n #define S390_GS_GSEPLA_REGNUM 3\n-/* total number of registers in s390-gs.xml */\n-#define S390_NUM_GS_REGS 4\n \n static int cpu_read_gs_reg(CPUS390XState *env, GByteArray *buf, int n)\n {\n@@ -322,33 +308,33 @@ void s390_cpu_gdb_init(CPUState *cs)\n {\n gdb_register_coprocessor(cs, cpu_read_ac_reg,\n cpu_write_ac_reg,\n- S390_NUM_AC_REGS, \"s390-acr.xml\", 0);\n+ gdb_find_static_feature(\"s390-acr.xml\"), 0);\n \n gdb_register_coprocessor(cs, cpu_read_fp_reg,\n cpu_write_fp_reg,\n- S390_NUM_FP_REGS, \"s390-fpr.xml\", 0);\n+ gdb_find_static_feature(\"s390-fpr.xml\"), 0);\n \n gdb_register_coprocessor(cs, cpu_read_vreg,\n cpu_write_vreg,\n- S390_NUM_VREGS, \"s390-vx.xml\", 0);\n+ gdb_find_static_feature(\"s390-vx.xml\"), 0);\n \n gdb_register_coprocessor(cs, cpu_read_gs_reg,\n cpu_write_gs_reg,\n- S390_NUM_GS_REGS, \"s390-gs.xml\", 0);\n+ gdb_find_static_feature(\"s390-gs.xml\"), 0);\n \n #ifndef CONFIG_USER_ONLY\n gdb_register_coprocessor(cs, cpu_read_c_reg,\n cpu_write_c_reg,\n- S390_NUM_C_REGS, \"s390-cr.xml\", 0);\n+ gdb_find_static_feature(\"s390-cr.xml\"), 0);\n \n gdb_register_coprocessor(cs, cpu_read_virt_reg,\n cpu_write_virt_reg,\n- S390_NUM_VIRT_REGS, \"s390-virt.xml\", 0);\n+ gdb_find_static_feature(\"s390-virt.xml\"), 0);\n \n if (kvm_enabled()) {\n gdb_register_coprocessor(cs, cpu_read_virt_kvm_reg,\n cpu_write_virt_kvm_reg,\n- S390_NUM_VIRT_KVM_REGS, \"s390-virt-kvm.xml\",\n+ gdb_find_static_feature(\"s390-virt-kvm.xml\"),\n 0);\n }\n #endif\n","prefixes":["v2","29/43"]}