{"id":1641680,"url":"http://patchwork.ozlabs.org/api/patches/1641680/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-ide/patch/20220610081801.11854-12-Sergey.Semin@baikalelectronics.ru/","project":{"id":13,"url":"http://patchwork.ozlabs.org/api/projects/13/?format=json","name":"Linux IDE development","link_name":"linux-ide","list_id":"linux-ide.vger.kernel.org","list_email":"linux-ide@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20220610081801.11854-12-Sergey.Semin@baikalelectronics.ru>","list_archive_url":null,"date":"2022-06-10T08:17:49","name":"[v4,11/23] dt-bindings: ata: ahci: Add platform capability properties","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"9cd0aca9b58015960ebc97b6d4be96e6a048e80a","submitter":{"id":78624,"url":"http://patchwork.ozlabs.org/api/people/78624/?format=json","name":"Serge Semin","email":"Sergey.Semin@baikalelectronics.ru"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-ide/patch/20220610081801.11854-12-Sergey.Semin@baikalelectronics.ru/mbox/","series":[{"id":304159,"url":"http://patchwork.ozlabs.org/api/series/304159/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-ide/list/?series=304159","date":"2022-06-10T08:17:42","name":"ata: ahci: Add DWC/Baikal-T1 AHCI SATA support","version":4,"mbox":"http://patchwork.ozlabs.org/series/304159/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1641680/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1641680/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linux-ide-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["bilbo.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=baikalelectronics.ru header.i=@baikalelectronics.ru\n header.a=rsa-sha256 header.s=mail header.b=lqzIhAhA;\n\tdkim-atps=neutral","ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2620:137:e000::1:20; helo=out1.vger.email;\n envelope-from=linux-ide-owner@vger.kernel.org; receiver=<UNKNOWN>)"],"Received":["from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20])\n\tby bilbo.ozlabs.org (Postfix) with ESMTP id 4LKDQP4HrGz9s5V\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Jun 2022 18:19:25 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n        id S1347337AbiFJITU (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n        Fri, 10 Jun 2022 04:19:20 -0400","from lindbergh.monkeyblade.net ([23.128.96.19]:59752 \"EHLO\n        lindbergh.monkeyblade.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n        with ESMTP id S1347370AbiFJISY (ORCPT\n        <rfc822;linux-ide@vger.kernel.org>); Fri, 10 Jun 2022 04:18:24 -0400","from mail.baikalelectronics.com (mail.baikalelectronics.com\n [87.245.175.230])\n        by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6DCEE22077A;\n        Fri, 10 Jun 2022 01:18:22 -0700 (PDT)","from mail (mail.baikal.int [192.168.51.25])\n        by mail.baikalelectronics.com (Postfix) with ESMTP id 8610D16A3;\n        Fri, 10 Jun 2022 11:19:04 +0300 (MSK)","from localhost (192.168.53.207) by mail (192.168.51.25) with\n Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jun 2022 11:18:12 +0300"],"DKIM-Filter":"OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 8610D16A3","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=baikalelectronics.ru; s=mail; t=1654849144;\n        bh=pN5RrGFPq8X383ZX0ty6vOonzWhfGG0ZcAvyXOImQx0=;\n        h=From:To:CC:Subject:Date:In-Reply-To:References:From;\n        b=lqzIhAhAWzE6ryIyWIdh84hjh8Acg1w1pQJJOeQ4yHvEAHGbLSLRZ3o2GbeR0sHr5\n         aBhvYHvVgY92ASN6cjTcT/ENqF8QydP9CEniqC0H3xO0tkXcR1Xvm6vQ+PelEQLawD\n         pU56/ZVzzCnj9lJfSw7ht9Q8jHCFT9amfJxlKm/0=","From":"Serge Semin <Sergey.Semin@baikalelectronics.ru>","To":"Damien Le Moal <damien.lemoal@opensource.wdc.com>,\n        Hans de Goede <hdegoede@redhat.com>,\n        Jens Axboe <axboe@kernel.dk>, Hannes Reinecke <hare@suse.de>,\n        Rob Herring <robh+dt@kernel.org>,\n        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>","CC":"Serge Semin <Sergey.Semin@baikalelectronics.ru>,\n        Serge Semin <fancer.lancer@gmail.com>,\n        Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,\n        Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,\n        <linux-ide@vger.kernel.org>, <linux-kernel@vger.kernel.org>,\n        <devicetree@vger.kernel.org>","Subject":"[PATCH v4 11/23] dt-bindings: ata: ahci: Add platform capability\n properties","Date":"Fri, 10 Jun 2022 11:17:49 +0300","Message-ID":"<20220610081801.11854-12-Sergey.Semin@baikalelectronics.ru>","In-Reply-To":"<20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru>","References":"<20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25)","X-Spam-Status":"No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n        DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS,\n        T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no\n        version=3.4.6","X-Spam-Checker-Version":"SpamAssassin 3.4.6 (2021-04-09) on\n        lindbergh.monkeyblade.net","Precedence":"bulk","List-ID":"<linux-ide.vger.kernel.org>","X-Mailing-List":"linux-ide@vger.kernel.org"},"content":"In case if the platform doesn't have BIOS or a comprehensive firmware\ninstalled then the HBA capability flags will be left uninitialized. As a\ngood alternative we suggest to define the DT-properties with the AHCI\nplatform capabilities describing all the HW-init flags of the\ncorresponding capability register. Luckily there aren't too many of them.\nSSS - Staggered Spin-up support and MPS - Mechanical Presence Switch\nsupport determine the corresponding feature availability for the whole HBA\nby means of the \"hba-cap\" property. Each port can have the \"hba-port-cap\"\nproperty initialized indicating that the port supports some of the next\nfunctionalities: HPCP - HotPlug capable port, MPSP - Mechanical Presence\nSwitch attached to a port, CPD - Cold Plug detection, ESP - External SATA\nPort (eSATA), FBSCP - FIS-based switching capable port.\n\nSigned-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>\n\n---\n\nChangelog v4:\n- Fix some misspelling in the patch log.\n- Convert the boolean properties to the bitfield properties. (@Rob)\n- Remove Hannes' rb tag due to the patch content change.\n---\n .../devicetree/bindings/ata/ahci-common.yaml  | 16 +++++++++++++++\n .../bindings/ata/ahci-platform.yaml           | 10 ++++++++++\n include/dt-bindings/ata/ahci.h                | 20 +++++++++++++++++++\n 3 files changed, 46 insertions(+)\n create mode 100644 include/dt-bindings/ata/ahci.h","diff":"diff --git a/Documentation/devicetree/bindings/ata/ahci-common.yaml b/Documentation/devicetree/bindings/ata/ahci-common.yaml\nindex 12a97b56226f..94d72aeaad0f 100644\n--- a/Documentation/devicetree/bindings/ata/ahci-common.yaml\n+++ b/Documentation/devicetree/bindings/ata/ahci-common.yaml\n@@ -58,6 +58,14 @@ properties:\n   phy-names:\n     const: sata-phy\n \n+  hba-cap:\n+    $ref: '/schemas/types.yaml#/definitions/uint32'\n+    description:\n+      Bitfield of the HBA generic platform capabilities like Staggered\n+      Spin-up or Mechanical Presence Switch support. It can be used to\n+      appropriately initialize the HWinit fields of the HBA CAP register\n+      in case if the system firmware hasn't done it.\n+\n   ports-implemented:\n     $ref: '/schemas/types.yaml#/definitions/uint32'\n     description:\n@@ -101,6 +109,14 @@ $defs:\n       target-supply:\n         description: Power regulator for SATA port target device\n \n+      hba-port-cap:\n+        $ref: '/schemas/types.yaml#/definitions/uint32'\n+        description:\n+          Bitfield of the HBA port-specific platform capabilities like Hot\n+          plugging, eSATA, FIS-based Switching, etc (see AHCI specification\n+          for details). It can be used to initialize the HWinit fields of\n+          the PxCMD register in case if the system firmware hasn't done it.\n+\n     required:\n       - reg\n \ndiff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml\nindex 15be98e0385b..e19cf9828e68 100644\n--- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml\n+++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml\n@@ -111,6 +111,8 @@ examples:\n   - |\n     #include <dt-bindings/interrupt-controller/arm-gic.h>\n     #include <dt-bindings/clock/berlin2q.h>\n+    #include <dt-bindings/ata/ahci.h>\n+\n     sata@f7e90000 {\n         compatible = \"marvell,berlin2q-ahci\", \"generic-ahci\";\n         reg = <0xf7e90000 0x1000>;\n@@ -119,15 +121,23 @@ examples:\n         #address-cells = <1>;\n         #size-cells = <0>;\n \n+        hba-cap = <HBA_SMPS>;\n+\n         sata0: sata-port@0 {\n             reg = <0>;\n+\n             phys = <&sata_phy 0>;\n             target-supply = <&reg_sata0>;\n+\n+            hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;\n         };\n \n         sata1: sata-port@1 {\n             reg = <1>;\n+\n             phys = <&sata_phy 1>;\n             target-supply = <&reg_sata1>;\n+\n+            hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;\n         };\n     };\ndiff --git a/include/dt-bindings/ata/ahci.h b/include/dt-bindings/ata/ahci.h\nnew file mode 100644\nindex 000000000000..6841caebcedf\n--- /dev/null\n+++ b/include/dt-bindings/ata/ahci.h\n@@ -0,0 +1,20 @@\n+/* SPDX-License-Identifier: GPL-2.0 */\n+/*\n+ * This header provides constants for most AHCI bindings.\n+ */\n+\n+#ifndef _DT_BINDINGS_ATA_AHCI_H\n+#define _DT_BINDINGS_ATA_AHCI_H\n+\n+/* Host Bus Adapter generic platform capabilities */\n+#define HBA_SSS\t\t(1 << 27)\n+#define HBA_SMPS\t(1 << 28)\n+\n+/* Host Bus Adapter port-specific platform capabilities */\n+#define HBA_PORT_HPCP\t(1 << 18)\n+#define HBA_PORT_MPSP\t(1 << 19)\n+#define HBA_PORT_CPD\t(1 << 20)\n+#define HBA_PORT_ESP\t(1 << 21)\n+#define HBA_PORT_FBSCP\t(1 << 22)\n+\n+#endif\n","prefixes":["v4","11/23"]}