{"id":1585797,"url":"http://patchwork.ozlabs.org/api/patches/1585797/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-25-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20220128153009.2467560-25-peter.maydell@linaro.org>","list_archive_url":null,"date":"2022-01-28T15:30:01","name":"[PULL,24/32] hw/intc/arm_gicv3_redist: Remove unnecessary zero checks","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"012b4afdbb27269154fd527cfe9684593f2bca02","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-25-peter.maydell@linaro.org/mbox/","series":[{"id":283405,"url":"http://patchwork.ozlabs.org/api/series/283405/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=283405","date":"2022-01-28T15:29:53","name":"[PULL,01/32] Update copyright dates to 2022","version":1,"mbox":"http://patchwork.ozlabs.org/series/283405/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1585797/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1585797/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=UXkE5MuO;\n\tdkim-atps=neutral","ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=<UNKNOWN>)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4Jljk15vpkz9t6g\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 29 Jan 2022 03:35:20 +1100 (AEDT)","from localhost ([::1]:34342 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1nDUDU-0004qL-Th\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Jan 2022 11:35:16 -0500","from eggs.gnu.org ([209.51.188.92]:58028)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTDM-0002Fl-He\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:31:06 -0500","from [2a00:1450:4864:20::42a] (port=33703\n helo=mail-wr1-x42a.google.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTDJ-0006QY-6I\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:31:04 -0500","by mail-wr1-x42a.google.com with SMTP id e8so11670346wrc.0\n for <qemu-devel@nongnu.org>; Fri, 28 Jan 2022 07:30:38 -0800 (PST)","from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2])\n by smtp.gmail.com with ESMTPSA id j3sm4749485wrb.57.2022.01.28.07.30.36\n for <qemu-devel@nongnu.org>\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 28 Jan 2022 07:30:36 -0800 (PST)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n h=from:to:subject:date:message-id:in-reply-to:references:mime-version\n :content-transfer-encoding;\n bh=GGXtm2CCFREumE88uavqGv2tctQ72q04jesCEJ5hOrc=;\n b=UXkE5MuOIxoS8ihBAvLOVlUGgUDilUovsl392icdr/SPZxapL3aT09oz7ch9tC6dio\n HmCEEXAX3XlC8fJ+7437fOPZcvsplUPng3Pz8xM16QeRwmaAJihJx46w5DSPIRUu1L9n\n JX9ZwQ8JQiCCgmIJG/CHHcd4JPLVLNsbM0wpkm0/ixsf6yMTZlVU+EKYkWbUW9TU+NZE\n CKH91/bjFlU98t/n/TkysEdeECkMB8p2a3vGXoxWbQeWs9kNHdPjlPWwHHk+HdaOS2e+\n RKPyqBOElLf2TlcpvTbVgpOGnAlGUUgEKfdBzCA104KhyaeMLngQgJBlV4/zV6s6KLbE\n Zhaw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=GGXtm2CCFREumE88uavqGv2tctQ72q04jesCEJ5hOrc=;\n b=zxdVEmdZURpFcIH8Wg0BHiYV9ER/X+CRIN2Xvw1OKwkqQ9V7FzTnL9RQ3Vi0jahyF4\n tDhWOnKnzHltuqjNM60VqrS0c0u7tL4ffvfR0qOezqhiPJBnpzBrtHfMtXKojdMiDYuJ\n 61DVQiZpCM9aa0skg5KaHcXjQNcSnu4qaSSiJsTTFa48KcWRLw8KxdugKKJUy8WXRPXx\n D1+kP+5G4SL9cd+hWL9lpMvL25NuCGDzoh8OT3c72rmMkUMn5/LuTWvUTdoscjoaLAaS\n 2MrvJtj4GjzN2MgNL9KfiYArISsmeLu7RFCoeTWFejkKUCAU13anAkt1/EL+SLsuk+F6\n D7tg==","X-Gm-Message-State":"AOAM531k1KpItMho+9K0H/2i2qRUnIbnX/eE2UyO3dXYM/nBPJIon5WG\n fsi7STzCViImrbf2KPQWCvHfgMA5ieMkGw==","X-Google-Smtp-Source":"\n ABdhPJwGxQnAjKrYB36V+Xe6CwAomThGtbtWOVzieFOL5f/a5YORRU48WzioK3fXP7hTNrHkQqehcQ==","X-Received":"by 2002:adf:f006:: with SMTP id j6mr7365314wro.444.1643383837512;\n Fri, 28 Jan 2022 07:30:37 -0800 (PST)","From":"Peter Maydell <peter.maydell@linaro.org>","To":"qemu-devel@nongnu.org","Subject":"[PULL 24/32] hw/intc/arm_gicv3_redist: Remove unnecessary zero checks","Date":"Fri, 28 Jan 2022 15:30:01 +0000","Message-Id":"<20220128153009.2467560-25-peter.maydell@linaro.org>","X-Mailer":"git-send-email 2.25.1","In-Reply-To":"<20220128153009.2467560-1-peter.maydell@linaro.org>","References":"<20220128153009.2467560-1-peter.maydell@linaro.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Host-Lookup-Failed":"Reverse DNS lookup failed for 2a00:1450:4864:20::42a\n (failed)","Received-SPF":"pass client-ip=2a00:1450:4864:20::42a;\n envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com","X-Spam_score_int":"-12","X-Spam_score":"-1.3","X-Spam_bar":"-","X-Spam_report":"(-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"The ITS-related parts of the redistributor code make some checks for\nwhether registers like GICR_PROPBASER and GICR_PENDBASER are zero.\nThere is no requirement in the specification for treating zeroes in\nthese address registers specially -- they contain guest physical\naddresses and it is entirely valid (if unusual) for the guest to\nchoose to put the tables they address at guest physical address zero.\nWe use these values only to calculate guest addresses, and attempts\nby the guest to use a bad address will be handled by the\naddress_space_* functions which we use to do the loads and stores.\n\nRemove the unnecessary checks.\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-id: 20220122182444.724087-9-peter.maydell@linaro.org\n---\n hw/intc/arm_gicv3_redist.c | 8 +++-----\n 1 file changed, 3 insertions(+), 5 deletions(-)","diff":"diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c\nindex 99b11ca5eee..d81d8e5f076 100644\n--- a/hw/intc/arm_gicv3_redist.c\n+++ b/hw/intc/arm_gicv3_redist.c\n@@ -591,8 +591,7 @@ void gicv3_redist_update_lpi_only(GICv3CPUState *cs)\n     idbits = MIN(FIELD_EX64(cs->gicr_propbaser, GICR_PROPBASER, IDBITS),\n                  GICD_TYPER_IDBITS);\n \n-    if (!(cs->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) || !cs->gicr_propbaser ||\n-        !cs->gicr_pendbaser) {\n+    if (!(cs->gicr_ctlr & GICR_CTLR_ENABLE_LPIS)) {\n         return;\n     }\n \n@@ -673,9 +672,8 @@ void gicv3_redist_process_lpi(GICv3CPUState *cs, int irq, int level)\n     idbits = MIN(FIELD_EX64(cs->gicr_propbaser, GICR_PROPBASER, IDBITS),\n                  GICD_TYPER_IDBITS);\n \n-    if (!(cs->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) || !cs->gicr_propbaser ||\n-         !cs->gicr_pendbaser || (irq > (1ULL << (idbits + 1)) - 1) ||\n-         irq < GICV3_LPI_INTID_START) {\n+    if (!(cs->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) ||\n+        (irq > (1ULL << (idbits + 1)) - 1) || irq < GICV3_LPI_INTID_START) {\n         return;\n     }\n \n","prefixes":["PULL","24/32"]}