{"id":1585773,"url":"http://patchwork.ozlabs.org/api/patches/1585773/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-32-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20220128153009.2467560-32-peter.maydell@linaro.org>","list_archive_url":null,"date":"2022-01-28T15:30:08","name":"[PULL,31/32] hw/arm: ast2600: Fix address mapping of second SPI controller","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d5909adcbf58c5b4d3ae9db95456ff5825d92a3c","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-32-peter.maydell@linaro.org/mbox/","series":[{"id":283405,"url":"http://patchwork.ozlabs.org/api/series/283405/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=283405","date":"2022-01-28T15:29:53","name":"[PULL,01/32] Update copyright dates to 2022","version":1,"mbox":"http://patchwork.ozlabs.org/series/283405/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1585773/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1585773/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=zlD9l3kt;\n\tdkim-atps=neutral","ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=<UNKNOWN>)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4Jlj8Q1zYXz9t3b\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 29 Jan 2022 03:09:42 +1100 (AEDT)","from localhost ([::1]:52844 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1nDToi-0003KJ-22\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Jan 2022 11:09:40 -0500","from eggs.gnu.org ([209.51.188.92]:57916)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTDJ-0002De-NK\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:31:03 -0500","from [2a00:1450:4864:20::435] (port=40811\n helo=mail-wr1-x435.google.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTDB-0006RL-Kj\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:58 -0500","by mail-wr1-x435.google.com with SMTP id s18so11561831wrv.7\n for <qemu-devel@nongnu.org>; Fri, 28 Jan 2022 07:30:43 -0800 (PST)","from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2])\n by smtp.gmail.com with ESMTPSA id j3sm4749485wrb.57.2022.01.28.07.30.41\n for <qemu-devel@nongnu.org>\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 28 Jan 2022 07:30:42 -0800 (PST)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n h=from:to:subject:date:message-id:in-reply-to:references:mime-version\n :content-transfer-encoding;\n bh=SmcQS5N83uze4IvwHy2cA3voYK/E+OCh44VoG8TqeA4=;\n b=zlD9l3ktJZrUN5nx99rgsjFdoRNl8TIeNSMS58+uLdBMTXKchTyJMEHVCsc7Q3DPbi\n 06DCZKqEYz43TSJbCIHR8o5IAsfut6KMZIbyuVuB1e8D6CoNNjhgKZD5PIlwACCRSp0S\n mq9ndDDOB5i2mcPGkiaPTsWOtPmrfp6CVRWUpMftMdJvqhF7f21CGr6UW1+nGc51TntE\n eEJlrEw/D8Y3cfzJH8JsW+PwaAZkHq22Qp4QjMFRFvaPrG753oAG7OSnt+2yIXYI9AWu\n 2jY8Kko89QQD6gkRw6SkbQP2u9Eoe6SFldgwo1d7kJ8YpeqYDgyOV6qPWqgWweUa8zBn\n Z+eQ==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=SmcQS5N83uze4IvwHy2cA3voYK/E+OCh44VoG8TqeA4=;\n b=SrLCc9cb/y3SR0vTiRZQO8mOKWwd6vjgtjAQev0r4pyDhosue5swR+GTHa43rNA7tC\n XSIAPK/L0jVGuMY8SMRzyEXa38d0g/SS4Iep2O/2XeHR5c8cPJ7ZW1WULk2M2QfIGtdZ\n xsTbrrAAH84GQMfa5MS6QbIRIy5VBV67ed5yfNinWT2B98u3hz0ODufW0WdFueW+ioux\n 5qJegqlV+QTpJg8xGMyTr3ZkD5gdNBIJjvCeMLyoTEfyO9vrC6eVLN7uTBKvREXJqcjA\n sOKovPnVMGPpSVYOaKnEDDIS85QYs0+rWbZL0IBQq1elc60O+fKk6+gLLVOdGyudlF2p\n stSg==","X-Gm-Message-State":"AOAM530gVoyNauEzWbWZHs/Is7uZ18P50/YclpLfYCMNhkx2MqWOCDye\n IxF23STW9fwtGkhuXNQW/nih8EqlyZxGmQ==","X-Google-Smtp-Source":"\n ABdhPJyHIMBHlUoIihk8Y1vZozhmh/zWlIjedvieQ+Q0TSpmiYxCplpT8XHW+M6hfn+7ztrDZU5uQQ==","X-Received":"by 2002:a5d:5001:: with SMTP id e1mr7593695wrt.415.1643383842433;\n Fri, 28 Jan 2022 07:30:42 -0800 (PST)","From":"Peter Maydell <peter.maydell@linaro.org>","To":"qemu-devel@nongnu.org","Subject":"[PULL 31/32] hw/arm: ast2600: Fix address mapping of second SPI\n controller","Date":"Fri, 28 Jan 2022 15:30:08 +0000","Message-Id":"<20220128153009.2467560-32-peter.maydell@linaro.org>","X-Mailer":"git-send-email 2.25.1","In-Reply-To":"<20220128153009.2467560-1-peter.maydell@linaro.org>","References":"<20220128153009.2467560-1-peter.maydell@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","X-Host-Lookup-Failed":"Reverse DNS lookup failed for 2a00:1450:4864:20::435\n (failed)","Received-SPF":"pass client-ip=2a00:1450:4864:20::435;\n envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com","X-Spam_score_int":"-12","X-Spam_score":"-1.3","X-Spam_bar":"-","X-Spam_report":"(-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"From: Cédric Le Goater <clg@kaod.org>\n\nAddress should be 0x1E631000 and not 0x1E641000 as initially introduced.\n\nResolves: https://gitlab.com/qemu-project/qemu/-/issues/838\nFixes: f25c0ae1079d (\"aspeed/soc: Add AST2600 support\")\nSuggested-by: Troy Lee <troy_lee@aspeedtech.com>\nSigned-off-by: Cédric Le Goater <clg@kaod.org>\nReviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>\nMessage-id: 20220126083520.4135713-1-clg@kaod.org\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n hw/arm/aspeed_ast2600.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c\nindex 8f37bdb1d87..12f6edc081f 100644\n--- a/hw/arm/aspeed_ast2600.c\n+++ b/hw/arm/aspeed_ast2600.c\n@@ -29,7 +29,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {\n     [ASPEED_DEV_PWM]       = 0x1E610000,\n     [ASPEED_DEV_FMC]       = 0x1E620000,\n     [ASPEED_DEV_SPI1]      = 0x1E630000,\n-    [ASPEED_DEV_SPI2]      = 0x1E641000,\n+    [ASPEED_DEV_SPI2]      = 0x1E631000,\n     [ASPEED_DEV_EHCI1]     = 0x1E6A1000,\n     [ASPEED_DEV_EHCI2]     = 0x1E6A3000,\n     [ASPEED_DEV_MII1]      = 0x1E650000,\n","prefixes":["PULL","31/32"]}