{"id":1585738,"url":"http://patchwork.ozlabs.org/api/patches/1585738/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-23-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20220128153009.2467560-23-peter.maydell@linaro.org>","list_archive_url":null,"date":"2022-01-28T15:29:59","name":"[PULL,22/32] hw/intc/arm_gicv3: Honour GICD_CTLR.EnableGrp1NS for LPIs","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"bd34e2f575dde8c8bc25a64fe6c75545e7d44793","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-23-peter.maydell@linaro.org/mbox/","series":[{"id":283405,"url":"http://patchwork.ozlabs.org/api/series/283405/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=283405","date":"2022-01-28T15:29:53","name":"[PULL,01/32] Update copyright dates to 2022","version":1,"mbox":"http://patchwork.ozlabs.org/series/283405/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1585738/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1585738/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=iVSvz6xI;\n\tdkim-atps=neutral","ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4Jlhhf4fDBz9t56\n\tfor ; Sat, 29 Jan 2022 02:49:06 +1100 (AEDT)","from localhost ([::1]:54272 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1nDTUl-00014Z-QX\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Jan 2022 10:49:03 -0500","from eggs.gnu.org ([209.51.188.92]:57756)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1nDTDD-0002B4-C6\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:58 -0500","from [2a00:1450:4864:20::335] (port=36642\n helo=mail-wm1-x335.google.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1nDTD0-0006QQ-3B\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:48 -0500","by mail-wm1-x335.google.com with SMTP id\n i187-20020a1c3bc4000000b0034d2ed1be2aso8467013wma.1\n for ; Fri, 28 Jan 2022 07:30:36 -0800 (PST)","from orth.archaic.org.uk (orth.archaic.org.uk. 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We get this right for\ntraditional interrupts, but forgot to account for it when adding\nLPIs. LPIs are always Group 1 NS and if the EnableGrp1NS bit is not\nset we must not forward them to the CPU.\n\nSigned-off-by: Peter Maydell \nReviewed-by: Richard Henderson \nMessage-id: 20220122182444.724087-7-peter.maydell@linaro.org\n---\n hw/intc/arm_gicv3.c | 1 +\n 1 file changed, 1 insertion(+)","diff":"diff --git a/hw/intc/arm_gicv3.c b/hw/intc/arm_gicv3.c\nindex 715df5421dd..6d3c8ee231c 100644\n--- a/hw/intc/arm_gicv3.c\n+++ b/hw/intc/arm_gicv3.c\n@@ -166,6 +166,7 @@ static void gicv3_redist_update_noirqset(GICv3CPUState *cs)\n }\n \n if ((cs->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) && cs->gic->lpi_enable &&\n+ (cs->gic->gicd_ctlr & GICD_CTLR_EN_GRP1NS) &&\n (cs->hpplpi.prio != 0xff)) {\n if (irqbetter(cs, cs->hpplpi.irq, cs->hpplpi.prio)) {\n cs->hppi.irq = cs->hpplpi.irq;\n","prefixes":["PULL","22/32"]}