{"id":1447386,"url":"http://patchwork.ozlabs.org/api/patches/1447386/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20210304144651.310037-12-alistair.francis@wdc.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20210304144651.310037-12-alistair.francis@wdc.com>","list_archive_url":null,"date":"2021-03-04T14:46:43","name":"[PULL,v2,11/19] docs/system: Sort targets in alphabetical order","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"48823044679cebfaf3423357bd274db8f04a9b47","submitter":{"id":74007,"url":"http://patchwork.ozlabs.org/api/people/74007/?format=json","name":"Alistair Francis","email":"alistair.francis@wdc.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20210304144651.310037-12-alistair.francis@wdc.com/mbox/","series":[{"id":232161,"url":"http://patchwork.ozlabs.org/api/series/232161/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=232161","date":"2021-03-04T14:46:33","name":"[PULL,v2,01/19] target/riscv: Declare csr_ops[] with a known size","version":2,"mbox":"http://patchwork.ozlabs.org/series/232161/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1447386/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1447386/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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d=\"scan'208\";a=\"271984420\"","WDCIronportException":"Internal","From":"Alistair Francis ","To":"peter.maydell@linaro.org","Subject":"[PULL v2 11/19] docs/system: Sort targets in alphabetical order","Date":"Thu, 4 Mar 2021 09:46:43 -0500","Message-Id":"<20210304144651.310037-12-alistair.francis@wdc.com>","X-Mailer":"git-send-email 2.30.1","In-Reply-To":"<20210304144651.310037-1-alistair.francis@wdc.com>","References":"<20210304144651.310037-1-alistair.francis@wdc.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=68.232.141.245;\n envelope-from=prvs=690dc056c=alistair.francis@wdc.com;\n helo=esa1.hgst.iphmx.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"alistair23@gmail.com, Bin Meng ,\n Alistair Francis , qemu-devel@nongnu.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n "},"content":"From: Bin Meng \n\nSigned-off-by: Bin Meng \nReviewed-by: Alistair Francis \nMessage-id: 20210126060007.12904-8-bmeng.cn@gmail.com\nSigned-off-by: Alistair Francis \n---\n docs/system/targets.rst | 19 ++++++++++++-------\n 1 file changed, 12 insertions(+), 7 deletions(-)","diff":"diff --git a/docs/system/targets.rst b/docs/system/targets.rst\nindex 560783644d..564cea9a9b 100644\n--- a/docs/system/targets.rst\n+++ b/docs/system/targets.rst\n@@ -7,16 +7,21 @@ various targets are mentioned in the following sections.\n \n Contents:\n \n+..\n+ This table of contents should be kept sorted alphabetically\n+ by the title text of each file, which isn't the same ordering\n+ as an alphabetical sort by filename.\n+\n .. toctree::\n \n- target-i386\n+ target-arm\n+ target-avr\n+ target-m68k\n+ target-mips\n target-ppc\n+ target-rx\n+ target-s390x\n target-sparc\n target-sparc64\n- target-mips\n- target-arm\n- target-m68k\n+ target-i386\n target-xtensa\n- target-s390x\n- target-rx\n- target-avr\n","prefixes":["PULL","v2","11/19"]}