{"id":1267787,"url":"http://patchwork.ozlabs.org/api/patches/1267787/?format=json","web_url":"http://patchwork.ozlabs.org/project/rtc-linux/patch/1586333531-21641-6-git-send-email-hsin-hsiung.wang@mediatek.com/","project":{"id":9,"url":"http://patchwork.ozlabs.org/api/projects/9/?format=json","name":"Linux RTC development","link_name":"rtc-linux","list_id":"linux-rtc.vger.kernel.org","list_email":"linux-rtc@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1586333531-21641-6-git-send-email-hsin-hsiung.wang@mediatek.com>","list_archive_url":null,"date":"2020-04-08T08:12:10","name":"[v12,5/6] rtc: mt6397: Add support for the MediaTek MT6358 RTC","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":false,"hash":"80db4072a62e0fcd4e97107abe55d2880212cbb4","submitter":{"id":74946,"url":"http://patchwork.ozlabs.org/api/people/74946/?format=json","name":"Hsin-Hsiung Wang","email":"hsin-hsiung.wang@mediatek.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/rtc-linux/patch/1586333531-21641-6-git-send-email-hsin-hsiung.wang@mediatek.com/mbox/","series":[{"id":169156,"url":"http://patchwork.ozlabs.org/api/series/169156/?format=json","web_url":"http://patchwork.ozlabs.org/project/rtc-linux/list/?series=169156","date":"2020-04-08T08:12:06","name":"Add Support for MediaTek PMIC MT6358","version":12,"mbox":"http://patchwork.ozlabs.org/series/169156/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1267787/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1267787/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (no SPF record)\n\tsmtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67;\n\thelo=vger.kernel.org;\n\tenvelope-from=linux-rtc-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org; dmarc=pass (p=none dis=none)\n\theader.from=mediatek.com","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=mediatek.com header.i=@mediatek.com\n\theader.a=rsa-sha256 header.s=dk header.b=o7nH+WxD; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 48xxq82v8Sz9sQx\n\tfor ;\n\tWed, 8 Apr 2020 18:13:08 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1727331AbgDHINH (ORCPT );\n\tWed, 8 Apr 2020 04:13:07 -0400","from mailgw01.mediatek.com ([210.61.82.183]:9335 \"EHLO\n\tmailgw01.mediatek.com\" rhost-flags-OK-FAIL-OK-FAIL) by\n\tvger.kernel.org with ESMTP id S1727126AbgDHING (ORCPT\n\t); Wed, 8 Apr 2020 04:13:06 -0400","from mtkcas07.mediatek.inc [(172.21.101.84)] by\n\tmailgw01.mediatek.com\n\t(envelope-from )\n\t(Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS)\n\twith ESMTP id 535684888; Wed, 08 Apr 2020 16:12:54 +0800","from MTKCAS06.mediatek.inc (172.21.101.30) by\n\tmtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server\n\t(TLS) id 15.0.1497.2; Wed, 8 Apr 2020 16:12:50 +0800","from mtksdaap41.mediatek.inc (172.21.77.4) by MTKCAS06.mediatek.inc\n\t(172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via\n\tFrontend Transport; Wed, 8 Apr 2020 16:12:49 +0800"],"X-UUID":["80a1dd2eae094e3a8d1ddd4796f34f7f-20200408","80a1dd2eae094e3a8d1ddd4796f34f7f-20200408"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=mediatek.com; s=dk; \n\th=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From;\n\tbh=TjyXO64FwGcewaav1xdCD25JCQNflx0WEYbeMtOQFrs=; \n\tb=o7nH+WxDZRgr6zPAiTS3xvOEm7iuiYChzQybKJXmSVpyJ/rVsK3jZKmCMGuRV6wqcSbA4XaeGSOuN7DBTAEieI6MO106W1bGGCIZ1vlYUGaAEl9xc1SDJtfTVipmNpMoxQMBLSxkUSxyo9FBCNcIPVET+HZMs68G3v6+P57IPIY=;","From":"Hsin-Hsiung Wang ","To":"Lee Jones , Rob Herring ,\n\tMatthias Brugger ,\n\tAlexandre Belloni ","CC":"Nicolas Boichat ,\n\tMark Rutland , Sean Wang ,\n\tSebastian Reichel ,\n\tEddie Huang ,\n\tAlessandro Zummo ,\n\tKate Stewart ,\n\tRichard Fontana ,\n\tFrank Wunderlich ,\n\tJosef Friedl ,\n\tThomas Gleixner ,\n\tHsin-Hsiung Wang ,\n\tRan Bi , ,\n\t,\n\t,\n\t, ,\n\t, ","Subject":"[PATCH v12 5/6] rtc: mt6397: Add support for the MediaTek MT6358 RTC","Date":"Wed, 8 Apr 2020 16:12:10 +0800","Message-ID":"<1586333531-21641-6-git-send-email-hsin-hsiung.wang@mediatek.com>","X-Mailer":"git-send-email 2.6.4","In-Reply-To":"<1586333531-21641-1-git-send-email-hsin-hsiung.wang@mediatek.com>","References":"<1586333531-21641-1-git-send-email-hsin-hsiung.wang@mediatek.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-TM-SNTS-SMTP":"FC9E6D3D677BFECBC59AA698A2C0BFB58BD00BC5E746CB6D9F98117B906E7CC52000:8","X-MTK":"N","Content-Transfer-Encoding":"base64","Sender":"linux-rtc-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-rtc@vger.kernel.org"},"content":"From: Ran Bi \n\nThis add support for the MediaTek MT6358 RTC. Driver using\ncompatible data to store different RTC_WRTGR address offset.\nThis replace RTC_WRTGR to RTC_WRTGR_MT6323 in mt6323-poweroff\ndriver which only needed by armv7 CPU without ATF.\n\nReviewed-by: Nicolas Boichat \nReviewed-by: Yingjoe Chen \nAcked-by: Alexandre Belloni \nAcked-by: Sebastian Reichel \nSigned-off-by: Ran Bi \nSigned-off-by: Hsin-Hsiung Wang \n---\n drivers/power/reset/mt6323-poweroff.c | 2 +-\n drivers/rtc/rtc-mt6397.c | 18 +++++++++++++++---\n include/linux/mfd/mt6397/rtc.h | 9 ++++++++-\n 3 files changed, 24 insertions(+), 5 deletions(-)","diff":"diff --git a/drivers/power/reset/mt6323-poweroff.c b/drivers/power/reset/mt6323-poweroff.c\r\nindex 1caf43d..0532803 100644\r\n--- a/drivers/power/reset/mt6323-poweroff.c\r\n+++ b/drivers/power/reset/mt6323-poweroff.c\r\n@@ -30,7 +30,7 @@ static void mt6323_do_pwroff(void)\r\n \tint ret;\r\n \r\n \tregmap_write(pwrc->regmap, pwrc->base + RTC_BBPU, RTC_BBPU_KEY);\r\n-\tregmap_write(pwrc->regmap, pwrc->base + RTC_WRTGR, 1);\r\n+\tregmap_write(pwrc->regmap, pwrc->base + RTC_WRTGR_MT6323, 1);\r\n \r\n \tret = regmap_read_poll_timeout(pwrc->regmap,\r\n \t\t\t\t\tpwrc->base + RTC_BBPU, val,\r\ndiff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c\r\nindex cda238d..f8b1353 100644\r\n--- a/drivers/rtc/rtc-mt6397.c\r\n+++ b/drivers/rtc/rtc-mt6397.c\r\n@@ -9,6 +9,7 @@\r\n #include \r\n #include \r\n #include \r\n+#include \r\n #include \r\n #include \r\n #include \r\n@@ -20,7 +21,7 @@ static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)\r\n \tint ret;\r\n \tu32 data;\r\n \r\n-\tret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1);\r\n+\tret = regmap_write(rtc->regmap, rtc->addr_base + rtc->data->wrtgr, 1);\r\n \tif (ret < 0)\r\n \t\treturn ret;\r\n \r\n@@ -269,6 +270,8 @@ static int mtk_rtc_probe(struct platform_device *pdev)\r\n \tres = platform_get_resource(pdev, IORESOURCE_MEM, 0);\r\n \trtc->addr_base = res->start;\r\n \r\n+\trtc->data = of_device_get_match_data(&pdev->dev);\r\n+\r\n \trtc->irq = platform_get_irq(pdev, 0);\r\n \tif (rtc->irq < 0)\r\n \t\treturn rtc->irq;\r\n@@ -325,9 +328,18 @@ static int mt6397_rtc_resume(struct device *dev)\r\n static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,\r\n \t\t\tmt6397_rtc_resume);\r\n \r\n+static const struct mtk_rtc_data mt6358_rtc_data = {\r\n+\t.wrtgr = RTC_WRTGR_MT6358,\r\n+};\r\n+\r\n+static const struct mtk_rtc_data mt6397_rtc_data = {\r\n+\t.wrtgr = RTC_WRTGR_MT6397,\r\n+};\r\n+\r\n static const struct of_device_id mt6397_rtc_of_match[] = {\r\n-\t{ .compatible = \"mediatek,mt6323-rtc\", },\r\n-\t{ .compatible = \"mediatek,mt6397-rtc\", },\r\n+\t{ .compatible = \"mediatek,mt6323-rtc\", .data = &mt6397_rtc_data },\r\n+\t{ .compatible = \"mediatek,mt6358-rtc\", .data = &mt6358_rtc_data },\r\n+\t{ .compatible = \"mediatek,mt6397-rtc\", .data = &mt6397_rtc_data },\r\n \t{ }\r\n };\r\n MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);\r\ndiff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h\r\nindex 7dfb63b..6200f3b 100644\r\n--- a/include/linux/mfd/mt6397/rtc.h\r\n+++ b/include/linux/mfd/mt6397/rtc.h\r\n@@ -18,7 +18,9 @@\r\n #define RTC_BBPU_CBUSY BIT(6)\r\n #define RTC_BBPU_KEY (0x43 << 8)\r\n \r\n-#define RTC_WRTGR 0x003c\r\n+#define RTC_WRTGR_MT6358 0x3a\r\n+#define RTC_WRTGR_MT6397 0x3c\r\n+#define RTC_WRTGR_MT6323 RTC_WRTGR_MT6397\r\n \r\n #define RTC_IRQ_STA 0x0002\r\n #define RTC_IRQ_STA_AL BIT(0)\r\n@@ -65,6 +67,10 @@\r\n #define MTK_RTC_POLL_DELAY_US 10\r\n #define MTK_RTC_POLL_TIMEOUT (jiffies_to_usecs(HZ))\r\n \r\n+struct mtk_rtc_data {\r\n+\tu32 wrtgr;\r\n+};\r\n+\r\n struct mt6397_rtc {\r\n \tstruct device *dev;\r\n \tstruct rtc_device *rtc_dev;\r\n@@ -74,6 +80,7 @@ struct mt6397_rtc {\r\n \tstruct regmap *regmap;\r\n \tint irq;\r\n \tu32 addr_base;\r\n+\tconst struct mtk_rtc_data *data;\r\n };\r\n \r\n #endif /* _LINUX_MFD_MT6397_RTC_H_ */\r\n","prefixes":["v12","5/6"]}