{"id":1019137,"url":"http://patchwork.ozlabs.org/api/patches/1019137/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1545989148-13582-37-git-send-email-aleksandar.markovic@rt-rk.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1545989148-13582-37-git-send-email-aleksandar.markovic@rt-rk.com>","list_archive_url":null,"date":"2018-12-28T09:25:43","name":"[PULL,36/41] disas: nanoMIPS: Reorder declarations and definitions of gpr decoders","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d21eb5ce8f8589102c93caa5bf069bb801ef68dc","submitter":{"id":68635,"url":"http://patchwork.ozlabs.org/api/people/68635/?format=json","name":"Aleksandar Markovic","email":"aleksandar.markovic@rt-rk.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1545989148-13582-37-git-send-email-aleksandar.markovic@rt-rk.com/mbox/","series":[{"id":83742,"url":"http://patchwork.ozlabs.org/api/series/83742/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=83742","date":"2018-12-28T09:25:09","name":"[PULL,01/41] MAINTAINERS: target/mips: Add MIPS files under default-configs directory","version":1,"mbox":"http://patchwork.ozlabs.org/series/83742/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1019137/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1019137/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=208.118.235.17; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=rt-rk.com"],"Received":["from lists.gnu.org (lists.gnu.org [208.118.235.17])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 43R2l509bQz9s0n\n\tfor ;\n\tFri, 28 Dec 2018 21:20:01 +1100 (AEDT)","from localhost ([127.0.0.1]:58142 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1gcpFG-0003hj-R8\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Dec 2018 05:19:58 -0500","from eggs.gnu.org ([208.118.235.92]:57948)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1gcpBS-00008L-Pg\n\tfor qemu-devel@nongnu.org; Fri, 28 Dec 2018 05:16:07 -0500","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1gcoxK-0004Iz-Vf\n\tfor qemu-devel@nongnu.org; Fri, 28 Dec 2018 05:01:30 -0500","from mx2.rt-rk.com ([89.216.37.149]:49711 helo=mail.rt-rk.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1gcoPO-0003Jy-IL\n\tfor qemu-devel@nongnu.org; Fri, 28 Dec 2018 04:26:22 -0500","from localhost (localhost [127.0.0.1])\n\tby mail.rt-rk.com (Postfix) with ESMTP id A783E1A2130;\n\tFri, 28 Dec 2018 10:25:56 +0100 (CET)","from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local\n\t[10.10.13.43])\n\tby mail.rt-rk.com (Postfix) with ESMTPSA id 6F6A51A2166;\n\tFri, 28 Dec 2018 10:25:56 +0100 (CET)"],"X-Virus-Scanned":"amavisd-new at rt-rk.com","From":"Aleksandar Markovic ","To":"qemu-devel@nongnu.org","Date":"Fri, 28 Dec 2018 10:25:43 +0100","Message-Id":"<1545989148-13582-37-git-send-email-aleksandar.markovic@rt-rk.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1545989148-13582-1-git-send-email-aleksandar.markovic@rt-rk.com>","References":"<1545989148-13582-1-git-send-email-aleksandar.markovic@rt-rk.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [fuzzy]","X-Received-From":"89.216.37.149","Subject":"[Qemu-devel] [PULL 36/41] disas: nanoMIPS: Reorder declarations and\n\tdefinitions of gpr decoders","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"peter.maydell@linaro.org, amarkovic@wavecomp.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"From: Aleksandar Markovic \n\nReorder declarations and definitions of gpr decoders by number of\ninput bits of corresponding encoding type.\n\nReviewed-by: Aleksandar Rikalo \nSigned-off-by: Aleksandar Markovic \n---\n disas/nanomips.cpp | 200 ++++++++++++++++++++++++++---------------------------\n disas/nanomips.h | 7 +-\n 2 files changed, 104 insertions(+), 103 deletions(-)","diff":"diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp\nindex 23556b4..d6632bb 100644\n--- a/disas/nanomips.cpp\n+++ b/disas/nanomips.cpp\n@@ -292,6 +292,77 @@ uint64 NMD::renumber_registers(uint64 index, uint64 *register_list,\n \n \n /*\n+ * NMD::decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type\n+ *\n+ * Map a 4-bit code to the 5-bit register space according to this pattern:\n+ *\n+ * 1 0\n+ * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n+ * | | | | | | | | | | | | | | | |\n+ * | | | | | | | | | | | | | | | |\n+ * | | | | | | | | | | | └---------------┐\n+ * | | | | | | | | | | └---------------┐ |\n+ * | | | | | | | | | └---------------┐ | |\n+ * | | | | | | | | └---------------┐ | | |\n+ * | | | | | | | | | | | | | | | |\n+ * | | | | | | | | | | | | | | | |\n+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n+ * 3 2 1 0\n+ *\n+ * Used in handling following instructions:\n+ *\n+ * - ADDU[4X4]\n+ * - LW[4X4]\n+ * - MOVEP[REV]\n+ * - MUL[4X4]\n+ * - SW[4X4]\n+ */\n+uint64 NMD::decode_gpr_gpr4(uint64 d)\n+{\n+ static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7,\n+ 16, 17, 18, 19, 20, 21, 22, 23 };\n+ return renumber_registers(d, register_list,\n+ sizeof(register_list) / sizeof(register_list[0]));\n+}\n+\n+\n+/*\n+ * NMD::decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type\n+ *\n+ * Map a 4-bit code to the 5-bit register space according to this pattern:\n+ *\n+ * 1 0\n+ * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n+ * | | | | | | | | | | | | | | | |\n+ * | | | | | | | | | | | | └---------------------┐\n+ * | | | | | | | | | | | └---------------┐ |\n+ * | | | | | | | | | | └---------------┐ | |\n+ * | | | | | | | | | └---------------┐ | | |\n+ * | | | | | | | | └---------------┐ | | | |\n+ * | | | | | | | | | | | | | | | |\n+ * | | | | | | | | | | | | | | | |\n+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n+ * 3 2 1 0\n+ *\n+ * This pattern is the same one used for 'gpr4' gpr encoding type, except for\n+ * the input value 3, that is mapped to the output value 0 instead of 11.\n+ *\n+ * Used in handling following instructions:\n+ *\n+ * - MOVE.BALC\n+ * - MOVEP\n+ * - SW[4X4]\n+ */\n+uint64 NMD::decode_gpr_gpr4_zero(uint64 d)\n+{\n+ static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7,\n+ 16, 17, 18, 19, 20, 21, 22, 23 };\n+ return renumber_registers(d, register_list,\n+ sizeof(register_list) / sizeof(register_list[0]));\n+}\n+\n+\n+/*\n * NMD::decode_gpr_gpr3() - decoder for 'gpr3' gpr encoding type\n *\n * Map a 3-bit code to the 5-bit register space according to this pattern:\n@@ -390,106 +461,6 @@ uint64 NMD::decode_gpr_gpr3_src_store(uint64 d)\n \n \n /*\n- * NMD::decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type\n- *\n- * Map a 1-bit code to the 5-bit register space according to this pattern:\n- *\n- * 1 0\n- * | |\n- * | |\n- * | └---------------------┐\n- * └---------------------┐ |\n- * | |\n- * | |\n- * | |\n- * | |\n- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n- * 3 2 1 0\n- *\n- * Used in handling following instruction:\n- *\n- * - MOVE.BALC\n- */\n-uint64 NMD::decode_gpr_gpr1(uint64 d)\n-{\n- static uint64 register_list[] = { 4, 5 };\n- return renumber_registers(d, register_list,\n- sizeof(register_list) / sizeof(register_list[0]));\n-}\n-\n-\n-/*\n- * NMD::decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type\n- *\n- * Map a 4-bit code to the 5-bit register space according to this pattern:\n- *\n- * 1 0\n- * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n- * | | | | | | | | | | | | | | | |\n- * | | | | | | | | | | | | └---------------------┐\n- * | | | | | | | | | | | └---------------┐ |\n- * | | | | | | | | | | └---------------┐ | |\n- * | | | | | | | | | └---------------┐ | | |\n- * | | | | | | | | └---------------┐ | | | |\n- * | | | | | | | | | | | | | | | |\n- * | | | | | | | | | | | | | | | |\n- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n- * 3 2 1 0\n- *\n- * This pattern is the same one used for 'gpr4' gpr encoding type, except for\n- * the input value 3, that is mapped to the output value 0 instead of 11.\n- *\n- * Used in handling following instructions:\n- *\n- * - MOVE.BALC\n- * - MOVEP\n- * - SW[4X4]\n- */\n-uint64 NMD::decode_gpr_gpr4_zero(uint64 d)\n-{\n- static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7,\n- 16, 17, 18, 19, 20, 21, 22, 23 };\n- return renumber_registers(d, register_list,\n- sizeof(register_list) / sizeof(register_list[0]));\n-}\n-\n-\n-/*\n- * NMD::decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type\n- *\n- * Map a 4-bit code to the 5-bit register space according to this pattern:\n- *\n- * 1 0\n- * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n- * | | | | | | | | | | | | | | | |\n- * | | | | | | | | | | | | | | | |\n- * | | | | | | | | | | | └---------------┐\n- * | | | | | | | | | | └---------------┐ |\n- * | | | | | | | | | └---------------┐ | |\n- * | | | | | | | | └---------------┐ | | |\n- * | | | | | | | | | | | | | | | |\n- * | | | | | | | | | | | | | | | |\n- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n- * 3 2 1 0\n- *\n- * Used in handling following instructions:\n- *\n- * - ADDU[4X4]\n- * - LW[4X4]\n- * - MOVEP[REV]\n- * - MUL[4X4]\n- * - SW[4X4]\n- */\n-uint64 NMD::decode_gpr_gpr4(uint64 d)\n-{\n- static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7,\n- 16, 17, 18, 19, 20, 21, 22, 23 };\n- return renumber_registers(d, register_list,\n- sizeof(register_list) / sizeof(register_list[0]));\n-}\n-\n-\n-/*\n * NMD::decode_gpr_gpr2_reg1() - decoder for 'gpr2.reg1' gpr encoding type\n *\n * Map a 2-bit code to the 5-bit register space according to this pattern:\n@@ -549,6 +520,35 @@ uint64 NMD::decode_gpr_gpr2_reg2(uint64 d)\n }\n \n \n+/*\n+ * NMD::decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type\n+ *\n+ * Map a 1-bit code to the 5-bit register space according to this pattern:\n+ *\n+ * 1 0\n+ * | |\n+ * | |\n+ * | └---------------------┐\n+ * └---------------------┐ |\n+ * | |\n+ * | |\n+ * | |\n+ * | |\n+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n+ * 3 2 1 0\n+ *\n+ * Used in handling following instruction:\n+ *\n+ * - MOVE.BALC\n+ */\n+uint64 NMD::decode_gpr_gpr1(uint64 d)\n+{\n+ static uint64 register_list[] = { 4, 5 };\n+ return renumber_registers(d, register_list,\n+ sizeof(register_list) / sizeof(register_list[0]));\n+}\n+\n+\n uint64 NMD::copy(uint64 d)\n {\n return d;\ndiff --git a/disas/nanomips.h b/disas/nanomips.h\nindex d6a6e3f..6482eda 100644\n--- a/disas/nanomips.h\n+++ b/disas/nanomips.h\n@@ -105,13 +105,14 @@ private:\n \n uint64 renumber_registers(uint64 index, uint64 *register_list,\n size_t register_list_size);\n+\n+ uint64 decode_gpr_gpr4(uint64 d);\n+ uint64 decode_gpr_gpr4_zero(uint64 d);\n uint64 decode_gpr_gpr3(uint64 d);\n uint64 decode_gpr_gpr3_src_store(uint64 d);\n- uint64 decode_gpr_gpr1(uint64 d);\n- uint64 decode_gpr_gpr4_zero(uint64 d);\n- uint64 decode_gpr_gpr4(uint64 d);\n uint64 decode_gpr_gpr2_reg1(uint64 d);\n uint64 decode_gpr_gpr2_reg2(uint64 d);\n+ uint64 decode_gpr_gpr1(uint64 d);\n \n uint64 copy(uint64 d);\n int64 copy(int64 d);\n","prefixes":["PULL","36/41"]}