{"id":1019109,"url":"http://patchwork.ozlabs.org/api/patches/1019109/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1545989148-13582-14-git-send-email-aleksandar.markovic@rt-rk.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1545989148-13582-14-git-send-email-aleksandar.markovic@rt-rk.com>","list_archive_url":null,"date":"2018-12-28T09:25:20","name":"[PULL,13/41] disas: nanoMIPS: Remove functions that are not used","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"de31a2d564bd60138bcf672f2027f45ec023dede","submitter":{"id":68635,"url":"http://patchwork.ozlabs.org/api/people/68635/?format=json","name":"Aleksandar Markovic","email":"aleksandar.markovic@rt-rk.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1545989148-13582-14-git-send-email-aleksandar.markovic@rt-rk.com/mbox/","series":[{"id":83742,"url":"http://patchwork.ozlabs.org/api/series/83742/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=83742","date":"2018-12-28T09:25:09","name":"[PULL,01/41] MAINTAINERS: target/mips: Add MIPS files under default-configs directory","version":1,"mbox":"http://patchwork.ozlabs.org/series/83742/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1019109/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1019109/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=208.118.235.17; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=rt-rk.com"],"Received":["from lists.gnu.org (lists.gnu.org [208.118.235.17])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 43R1kP5spzz9s2P\n\tfor ;\n\tFri, 28 Dec 2018 20:34:21 +1100 (AEDT)","from localhost ([127.0.0.1]:57797 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1gcoX5-0000k0-Gt\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Dec 2018 04:34:19 -0500","from eggs.gnu.org ([208.118.235.92]:48019)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1gcoPH-0000q6-Pe\n\tfor qemu-devel@nongnu.org; Fri, 28 Dec 2018 04:26:55 -0500","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1gcoPB-0003Hq-HM\n\tfor qemu-devel@nongnu.org; Fri, 28 Dec 2018 04:26:15 -0500","from mx2.rt-rk.com ([89.216.37.149]:49212 helo=mail.rt-rk.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1gcoPB-00034p-3W\n\tfor qemu-devel@nongnu.org; Fri, 28 Dec 2018 04:26:09 -0500","from localhost (localhost [127.0.0.1])\n\tby mail.rt-rk.com (Postfix) with ESMTP id 3FE4B1A20BE;\n\tFri, 28 Dec 2018 10:25:55 +0100 (CET)","from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local\n\t[10.10.13.43])\n\tby mail.rt-rk.com (Postfix) with ESMTPSA id EB1DA1A20C6;\n\tFri, 28 Dec 2018 10:25:54 +0100 (CET)"],"X-Virus-Scanned":"amavisd-new at rt-rk.com","From":"Aleksandar Markovic ","To":"qemu-devel@nongnu.org","Date":"Fri, 28 Dec 2018 10:25:20 +0100","Message-Id":"<1545989148-13582-14-git-send-email-aleksandar.markovic@rt-rk.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1545989148-13582-1-git-send-email-aleksandar.markovic@rt-rk.com>","References":"<1545989148-13582-1-git-send-email-aleksandar.markovic@rt-rk.com>","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [fuzzy]","X-Received-From":"89.216.37.149","Subject":"[Qemu-devel] [PULL 13/41] disas: nanoMIPS: Remove functions that\n\tare not used","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"peter.maydell@linaro.org, amarkovic@wavecomp.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"From: Aleksandar Markovic \n\nSome functions were not used at all. Compiler doesn't complain\nsince they are class memebers. Remove them - no future usage is\nplanned.\n\nReviewed-by: Aleksandar Rikalo \nReviewed-by: Stefan Markovic \nSigned-off-by: Aleksandar Markovic \n---\n disas/nanomips.cpp | 208 -----------------------------------------------------\n disas/nanomips.h | 25 -------\n 2 files changed, 233 deletions(-)","diff":"diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp\nindex e082a3f..4784530 100644\n--- a/disas/nanomips.cpp\n+++ b/disas/nanomips.cpp\n@@ -856,23 +856,6 @@ uint64 NMD::extract_stripe_6(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil17il0bs1Fmsb0(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 17, 1);\n- return value;\n-}\n-\n-\n-uint64 NMD::extr_xil2il0bs1_il15il0bs1Fmsb0(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 2, 1);\n- value |= extract_bits(instruction, 15, 1);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_ac_13_12(uint64 instruction)\n {\n uint64 value = 0;\n@@ -923,14 +906,6 @@ uint64 NMD::extract_shift_5_4_3_2_1_0(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil10il0bs6Fmsb5(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 10, 6);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_count_19_18_17_16(uint64 instruction)\n {\n uint64 value = 0;\n@@ -947,15 +922,6 @@ uint64 NMD::extract_code_2_1_0(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil10il0bs4_il22il0bs4Fmsb3(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 10, 4);\n- value |= extract_bits(instruction, 22, 4);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction)\n {\n uint64 value = 0;\n@@ -980,14 +946,6 @@ uint64 NMD::extr_uil3il3bs18Fmsb20(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil12il0bs1Fmsb0(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 12, 1);\n- return value;\n-}\n-\n-\n uint64 NMD::extr_uil0il2bs4Fmsb5(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1012,14 +970,6 @@ uint64 NMD::extr_uil0il2bs3Fmsb4(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil10il0bs1Fmsb0(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 10, 1);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_rd3_3_2_1(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1052,22 +1002,6 @@ uint64 NMD::extract_ru_7_6_5_4_3(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil21il0bs5Fmsb4(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 21, 5);\n- return value;\n-}\n-\n-\n-uint64 NMD::extr_xil9il0bs3Fmsb2(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 9, 3);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_u_17_to_0(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1076,15 +1010,6 @@ uint64 NMD::extract_u_17_to_0(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil14il0bs1_il15il0bs1Fmsb0(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 14, 1);\n- value |= extract_bits(instruction, 15, 1);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1094,14 +1019,6 @@ uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil24il0bs1Fmsb0(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 24, 1);\n- return value;\n-}\n-\n-\n int64 NMD::extr_sil0il21bs1_il1il1bs20Tmsb21(uint64 instruction)\n {\n int64 value = 0;\n@@ -1154,15 +1071,6 @@ int64 NMD::extract_shift_21_20_19_18_17_16(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil6il0bs3_il10il0bs1Fmsb2(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 6, 3);\n- value |= extract_bits(instruction, 10, 1);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_rd2_3_8(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1172,14 +1080,6 @@ uint64 NMD::extract_rd2_3_8(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil16il0bs5Fmsb4(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 16, 5);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_code_17_to_0(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1188,14 +1088,6 @@ uint64 NMD::extract_code_17_to_0(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil0il0bs12Fmsb11(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 0, 12);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_size_20_19_18_17_16(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1264,15 +1156,6 @@ uint64 NMD::extract_hs_20_19_18_17_16(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil10il0bs1_il14il0bs2Fmsb1(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 10, 1);\n- value |= extract_bits(instruction, 14, 2);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_sel_13_12_11(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1289,14 +1172,6 @@ uint64 NMD::extract_lsb_4_3_2_1_0(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil14il0bs2Fmsb1(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 14, 2);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_gp_2(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1337,14 +1212,6 @@ uint64 NMD::extract_cs_20_19_18_17_16(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil16il0bs10Fmsb9(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 16, 10);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_rt4_9_7_6_5(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1370,14 +1237,6 @@ uint64 NMD::extr_uil0il2bs6Fmsb7(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil17il0bs9Fmsb8(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 17, 9);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_sa_15_14_13(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1468,15 +1327,6 @@ uint64 NMD::extract_bit_16_15_14_13_12_11(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil10il0bs1_il11il0bs5Fmsb4(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 10, 1);\n- value |= extract_bits(instruction, 11, 5);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_mask_20_19_18_17_16_15_14(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1537,22 +1387,6 @@ uint64 NMD::extract_u_20_19_18_17_16_15_14_13(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil15il0bs1Fmsb0(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 15, 1);\n- return value;\n-}\n-\n-\n-uint64 NMD::extr_xil11il0bs5Fmsb4(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 11, 5);\n- return value;\n-}\n-\n-\n uint64 NMD::extr_uil2il2bs16Fmsb17(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1595,15 +1429,6 @@ int64 NMD::extr_sil0il25bs1_il1il1bs24Tmsb25(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil0il0bs3_il4il0bs1Fmsb2(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 0, 3);\n- value |= extract_bits(instruction, 4, 1);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_u_1_0(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1621,15 +1446,6 @@ uint64 NMD::extr_uil3il3bs1_il8il2bs1Fmsb3(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil9il0bs3_il16il0bs5Fmsb4(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 9, 3);\n- value |= extract_bits(instruction, 16, 5);\n- return value;\n-}\n-\n-\n uint64 NMD::extract_fd_10_9_8_7_6(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1638,14 +1454,6 @@ uint64 NMD::extract_fd_10_9_8_7_6(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil6il0bs3Fmsb2(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 6, 3);\n- return value;\n-}\n-\n-\n uint64 NMD::extr_uil0il2bs5Fmsb6(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1679,14 +1487,6 @@ uint64 NMD::extract_ct_25_24_23_22_21(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil11il0bs1Fmsb0(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 11, 1);\n- return value;\n-}\n-\n-\n uint64 NMD::extr_uil2il2bs19Fmsb20(uint64 instruction)\n {\n uint64 value = 0;\n@@ -1713,14 +1513,6 @@ uint64 NMD::extr_uil0il1bs4Fmsb4(uint64 instruction)\n }\n \n \n-uint64 NMD::extr_xil9il0bs2Fmsb1(uint64 instruction)\n-{\n- uint64 value = 0;\n- value |= extract_bits(instruction, 9, 2);\n- return value;\n-}\n-\n-\n \n bool NMD::ADDIU_32__cond(uint64 instruction)\n {\ndiff --git a/disas/nanomips.h b/disas/nanomips.h\nindex c7477c2..4defd35 100644\n--- a/disas/nanomips.h\n+++ b/disas/nanomips.h\n@@ -245,31 +245,6 @@ private:\n uint64 extr_uil3il3bs1_il8il2bs1Fmsb3(uint64 instruction);\n uint64 extr_uil3il3bs9Fmsb11(uint64 instruction);\n uint64 extr_uil4il4bs4Fmsb7(uint64 instruction);\n- uint64 extr_xil0il0bs12Fmsb11(uint64 instruction);\n- uint64 extr_xil0il0bs3_il4il0bs1Fmsb2(uint64 instruction);\n- uint64 extr_xil10il0bs1Fmsb0(uint64 instruction);\n- uint64 extr_xil10il0bs1_il11il0bs5Fmsb4(uint64 instruction);\n- uint64 extr_xil10il0bs1_il14il0bs2Fmsb1(uint64 instruction);\n- uint64 extr_xil10il0bs4_il22il0bs4Fmsb3(uint64 instruction);\n- uint64 extr_xil10il0bs6Fmsb5(uint64 instruction);\n- uint64 extr_xil11il0bs1Fmsb0(uint64 instruction);\n- uint64 extr_xil11il0bs5Fmsb4(uint64 instruction);\n- uint64 extr_xil12il0bs1Fmsb0(uint64 instruction);\n- uint64 extr_xil14il0bs1_il15il0bs1Fmsb0(uint64 instruction);\n- uint64 extr_xil14il0bs2Fmsb1(uint64 instruction);\n- uint64 extr_xil15il0bs1Fmsb0(uint64 instruction);\n- uint64 extr_xil16il0bs10Fmsb9(uint64 instruction);\n- uint64 extr_xil16il0bs5Fmsb4(uint64 instruction);\n- uint64 extr_xil17il0bs1Fmsb0(uint64 instruction);\n- uint64 extr_xil17il0bs9Fmsb8(uint64 instruction);\n- uint64 extr_xil21il0bs5Fmsb4(uint64 instruction);\n- uint64 extr_xil24il0bs1Fmsb0(uint64 instruction);\n- uint64 extr_xil2il0bs1_il15il0bs1Fmsb0(uint64 instruction);\n- uint64 extr_xil6il0bs3Fmsb2(uint64 instruction);\n- uint64 extr_xil6il0bs3_il10il0bs1Fmsb2(uint64 instruction);\n- uint64 extr_xil9il0bs2Fmsb1(uint64 instruction);\n- uint64 extr_xil9il0bs3Fmsb2(uint64 instruction);\n- uint64 extr_xil9il0bs3_il16il0bs5Fmsb4(uint64 instruction);\n \n bool ADDIU_32__cond(uint64 instruction);\n bool ADDIU_RS5__cond(uint64 instruction);\n","prefixes":["PULL","13/41"]}