{"id":1019102,"url":"http://patchwork.ozlabs.org/api/patches/1019102/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1545989148-13582-11-git-send-email-aleksandar.markovic@rt-rk.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1545989148-13582-11-git-send-email-aleksandar.markovic@rt-rk.com>","list_archive_url":null,"date":"2018-12-28T09:25:17","name":"[PULL,10/41] target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ec6217dcba8fcb634a985b380a117e21d4ffff8d","submitter":{"id":68635,"url":"http://patchwork.ozlabs.org/api/people/68635/?format=json","name":"Aleksandar Markovic","email":"aleksandar.markovic@rt-rk.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1545989148-13582-11-git-send-email-aleksandar.markovic@rt-rk.com/mbox/","series":[{"id":83742,"url":"http://patchwork.ozlabs.org/api/series/83742/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=83742","date":"2018-12-28T09:25:09","name":"[PULL,01/41] MAINTAINERS: target/mips: Add MIPS files under default-configs directory","version":1,"mbox":"http://patchwork.ozlabs.org/series/83742/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/1019102/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/1019102/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=208.118.235.17; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=rt-rk.com"],"Received":["from lists.gnu.org (lists.gnu.org [208.118.235.17])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 43R1Zj2g8tz9s2P\n\tfor ;\n\tFri, 28 Dec 2018 20:27:41 +1100 (AEDT)","from localhost ([127.0.0.1]:57738 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1gcoQd-0001Ut-4F\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Dec 2018 04:27:39 -0500","from eggs.gnu.org ([208.118.235.92]:48005)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1gcoPH-0000pV-Bf\n\tfor qemu-devel@nongnu.org; Fri, 28 Dec 2018 04:26:40 -0500","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1gcoPB-0003HV-9l\n\tfor qemu-devel@nongnu.org; Fri, 28 Dec 2018 04:26:15 -0500","from mx2.rt-rk.com ([89.216.37.149]:49205 helo=mail.rt-rk.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1gcoPB-00034b-1V\n\tfor qemu-devel@nongnu.org; Fri, 28 Dec 2018 04:26:09 -0500","from localhost (localhost [127.0.0.1])\n\tby mail.rt-rk.com (Postfix) with ESMTP id 1B40E1A213A;\n\tFri, 28 Dec 2018 10:25:55 +0100 (CET)","from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local\n\t[10.10.13.43])\n\tby mail.rt-rk.com (Postfix) with ESMTPSA id D2A0E1A2122;\n\tFri, 28 Dec 2018 10:25:54 +0100 (CET)"],"X-Virus-Scanned":"amavisd-new at rt-rk.com","From":"Aleksandar Markovic ","To":"qemu-devel@nongnu.org","Date":"Fri, 28 Dec 2018 10:25:17 +0100","Message-Id":"<1545989148-13582-11-git-send-email-aleksandar.markovic@rt-rk.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1545989148-13582-1-git-send-email-aleksandar.markovic@rt-rk.com>","References":"<1545989148-13582-1-git-send-email-aleksandar.markovic@rt-rk.com>","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [fuzzy]","X-Received-From":"89.216.37.149","Subject":"[Qemu-devel] [PULL 10/41] target/mips: Support R5900 three-operand\n\tMADD1 and MADDU1 instructions","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"peter.maydell@linaro.org, amarkovic@wavecomp.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"From: Fredrik Noring \n\nThe three-operand MADD and MADDU are specific to R5900 cores.\n\nReviewed-by: Aleksandar Markovic \nSigned-off-by: Aleksandar Markovic \nSigned-off-by: Fredrik Noring \n---\n target/mips/translate.c | 12 +++++++++---\n 1 file changed, 9 insertions(+), 3 deletions(-)","diff":"diff --git a/target/mips/translate.c b/target/mips/translate.c\nindex 3ad3b31..7bf0ee8 100644\n--- a/target/mips/translate.c\n+++ b/target/mips/translate.c\n@@ -5039,7 +5039,7 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc,\n *\n * and\n *\n- * MADD[U] rd, rs, rt\n+ * MADD[U][1] rd, rs, rt\n *\n * such that\n *\n@@ -5101,6 +5101,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc,\n tcg_temp_free_i32(t3);\n }\n break;\n+ case MMI_OPC_MADD1:\n+ acc = 1;\n+ /* Fall through */\n case MMI_OPC_MADD:\n {\n TCGv_i64 t2 = tcg_temp_new_i64();\n@@ -5120,6 +5123,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc,\n tcg_temp_free_i64(t2);\n }\n break;\n+ case MMI_OPC_MADDU1:\n+ acc = 1;\n+ /* Fall through */\n case MMI_OPC_MADDU:\n {\n TCGv_i64 t2 = tcg_temp_new_i64();\n@@ -26753,6 +26759,8 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)\n case MMI_OPC_MULTU1:\n case MMI_OPC_MADD:\n case MMI_OPC_MADDU:\n+ case MMI_OPC_MADD1:\n+ case MMI_OPC_MADDU1:\n gen_mul_txx9(ctx, opc, rd, rs, rt);\n break;\n case MMI_OPC_DIV1:\n@@ -26768,8 +26776,6 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)\n gen_HILO1_tx79(ctx, opc, rd);\n break;\n case MMI_OPC_PLZCW: /* TODO: MMI_OPC_PLZCW */\n- case MMI_OPC_MADD1: /* TODO: MMI_OPC_MADD1 */\n- case MMI_OPC_MADDU1: /* TODO: MMI_OPC_MADDU1 */\n case MMI_OPC_PMFHL: /* TODO: MMI_OPC_PMFHL */\n case MMI_OPC_PMTHL: /* TODO: MMI_OPC_PMTHL */\n case MMI_OPC_PSLLH: /* TODO: MMI_OPC_PSLLH */\n","prefixes":["PULL","10/41"]}