{"id":818443,"url":"http://patchwork.ozlabs.org/api/covers/818443/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170926041700.22663-1-kalyan.kinthada@alliedtelesis.co.nz/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170926041700.22663-1-kalyan.kinthada@alliedtelesis.co.nz>","list_archive_url":null,"date":"2017-09-26T04:16:58","name":"[0/2] Implement guideline when NAND, NOR arbitration is enabled","submitter":{"id":72417,"url":"http://patchwork.ozlabs.org/api/people/72417/?format=json","name":"Kalyan Kinthada","email":"kalyan.kinthada@alliedtelesis.co.nz"},"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170926041700.22663-1-kalyan.kinthada@alliedtelesis.co.nz/mbox/","series":[{"id":5053,"url":"http://patchwork.ozlabs.org/api/series/5053/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=5053","date":"2017-09-26T04:16:59","name":"Implement guideline when NAND, NOR arbitration is enabled","version":1,"mbox":"http://patchwork.ozlabs.org/series/5053/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/818443/comments/","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=alliedtelesis.co.nz\n\theader.i=@alliedtelesis.co.nz\n\theader.b=\"wqZjrqtS\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1SMn2HFWz9t49\n\tfor ;\n\tTue, 26 Sep 2017 14:17:09 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S965518AbdIZERH (ORCPT );\n\tTue, 26 Sep 2017 00:17:07 -0400","from gate2.alliedtelesis.co.nz ([202.36.163.20]:47802 \"EHLO\n\tgate2.alliedtelesis.co.nz\" rhost-flags-OK-OK-OK-OK) by\n\tvger.kernel.org with ESMTP id S935791AbdIZERF (ORCPT\n\t); Tue, 26 Sep 2017 00:17:05 -0400","from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (Client did not present a certificate)\n\tby gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id D447F8364D;\n\tTue, 26 Sep 2017 17:17:02 +1300 (NZDT)","from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with\n\tTrustwave SEG (v7, 5, 8, 10121)\n\tid ; Tue, 26 Sep 2017 17:17:03 +1300","from kalyank-dl.ws.atlnz.lc (kalyank-dl.ws.atlnz.lc [10.33.14.14])\n\tby smtp (Postfix) with ESMTP id 0837A13ECC6;\n\tTue, 26 Sep 2017 17:17:14 +1300 (NZDT)","by kalyank-dl.ws.atlnz.lc (Postfix, from userid 1628)\n\tid 8F7BAC07A3; Tue, 26 Sep 2017 17:17:02 +1300 (NZDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; \n\ts=mail; t=1506399422;\n\tbh=YVKqcHDxfR9NY2kK3eBOndNalbDiw4S1uVjORsSrOX0=;\n\th=From:To:Cc:Subject:Date;\n\tb=wqZjrqtSZjAlLJraHfnXLWl5XKBBySqcXg5IQ7y3DwTie19d/IzjTnbPAMvycbngs\n\t1AdFfSK0goA+sW5oWDu2g/gzxUBZL7965+KJyBs977oF0j61Uf1+Ba63K/7a0brNZX\n\tm0Bm04dLQ9RsEVi61AZNyYdQO8QM1bzx6vBpjvqA=","From":"Kalyan Kinthada ","To":"dwmw2@infradead.org, computersforpeace@gmail.com,\n\tboris.brezillon@free-electrons.com, marek.vasut@gmail.com,\n\trichard@nod.at, cyrille.pitchen@wedev4u.fr, robh+dt@kernel.org,\n\tmark.rutland@arm.com, ezequiel.garcia@free-electrons.com,\n\tdevicetree@vger.kernel.org","Cc":"linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tchris.packham@alliedtelesis.co.nz,\n\tKalyan Kinthada ","Subject":"[PATCH 0/2] Implement guideline when NAND,\n\tNOR arbitration is enabled","Date":"Tue, 26 Sep 2017 17:16:58 +1300","Message-Id":"<20170926041700.22663-1-kalyan.kinthada@alliedtelesis.co.nz>","X-Mailer":"git-send-email 2.14.1","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"When the arbitration between NOR and NAND flash is enabled\nthe field bit[21] in the Data Flash Control Register\nneeds to be set to 1 according to guidleine GL-5830741.\n\nThis patch series contain the following patches:\n* Patch 1: \"dt-bindings: mtd: pxa3xx: Add \"marvell,nand-force-csx\" compatible string\"\n * New binding is introduced to implement the guildeline GL-5830741 which will\n be activated in the appropriate device tree files.\n\n* Patch 2: \"mtd: nand: pxa3xx: Handle \"marvell,nand-force-csx\" compatible string\"\n * Set the FORCE_CSX bit in Data Flash Control Register if \"marvell,nand-force-csx\"\n compatible string is activated in the device tree.\n\n-----------------\nKalyan Kinthada (2):\n[PATCH 1/2] dt-bindings: mtd: pxa3xx: Add \"marvell,nand-force-csx\" compatible string\n[PATCH 2/2] mtd: nand: pxa3xx: Handle \"marvell,nand-force-csx\" compatible string\n\n Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt | 1 +\n drivers/mtd/nand/pxa3xx_nand.c | 6 ++++++\n include/linux/platform_data/mtd-nand-pxa3xx.h | 3 +++\n 3 files changed, 10 insertions(+)"}