{"id":817889,"url":"http://patchwork.ozlabs.org/api/covers/817889/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170924105924.23923-1-vigneshr@ti.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170924105924.23923-1-vigneshr@ti.com>","list_archive_url":null,"date":"2017-09-24T10:59:19","name":"[v3,0/5] K2G: Add QSPI support","submitter":{"id":65039,"url":"http://patchwork.ozlabs.org/api/people/65039/?format=json","name":"Raghavendra, Vignesh","email":"vigneshr@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170924105924.23923-1-vigneshr@ti.com/mbox/","series":[{"id":4810,"url":"http://patchwork.ozlabs.org/api/series/4810/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=4810","date":"2017-09-24T10:59:20","name":"K2G: Add QSPI support","version":3,"mbox":"http://patchwork.ozlabs.org/series/4810/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/817889/comments/","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"bZ8t6q+a\"; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y0PQx3HX3z9sDB\n\tfor ;\n\tSun, 24 Sep 2017 21:01:13 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752113AbdIXLAN (ORCPT\n\t);\n\tSun, 24 Sep 2017 07:00:13 -0400","from lelnx194.ext.ti.com ([198.47.27.80]:23689 \"EHLO\n\tlelnx194.ext.ti.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752041AbdIXLAL (ORCPT\n\t); Sun, 24 Sep 2017 07:00:11 -0400","from dflxv15.itg.ti.com ([128.247.5.124])\n\tby lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8OAx8aN019909; \n\tSun, 24 Sep 2017 05:59:08 -0500","from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26])\n\tby dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8OAx8Hv015922;\n\tSun, 24 Sep 2017 05:59:08 -0500","from DLEE112.ent.ti.com (157.170.170.23) by DLEE115.ent.ti.com\n\t(157.170.170.26) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tSun, 24 Sep 2017 05:59:07 -0500","from dflp33.itg.ti.com (10.64.6.16) by DLEE112.ent.ti.com\n\t(157.170.170.23) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Sun, 24 Sep 2017 05:59:07 -0500","from a0132425.india.ti.com (ileax41-snat.itg.ti.com\n\t[10.172.224.153])\n\tby dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8OAx4DD027688;\n\tSun, 24 Sep 2017 05:59:04 -0500"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506250748;\n\tbh=XwpIrndr3awSJieA+KuOHq87eA+3sy5laQPA5fAkYzo=;\n\th=From:To:CC:Subject:Date;\n\tb=bZ8t6q+a7SzEke6WY/XzgLJJHxIsfJ8XSBzxZsQ3ROkKCTkK8kdhmVH8w5x6L45LY\n\tkhKz9nslMSIPNvNIZhlp01fo46jjOrq8MLHQBiIDSq2a8xb5Ao8xIxxkPiGUIhypyU\n\tP8pdYeWjvs01xN5eTegVY1cQnXdneFb3+QMv1Yic=","From":"Vignesh R ","To":"Marek Vasut ,\n\tCyrille Pitchen ","CC":"David Woodhouse ,\n\tBrian Norris ,\n\tBoris Brezillon ,\n\tRob Herring ,\n\t, ,\n\t, Vignesh R ,\n\tlinux-arm-kernel ","Subject":"[PATCH v3 0/5] K2G: Add QSPI support","Date":"Sun, 24 Sep 2017 16:29:19 +0530","Message-ID":"<20170924105924.23923-1-vigneshr@ti.com>","X-Mailer":"git-send-email 2.14.1","MIME-Version":"1.0","Content-Type":"text/plain","X-EXCLAIMER-MD-CONFIG":"e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"This series adds support for Cadence QSPI IP present in TI's 66AK2G SoC.\nThe patches enhance the existing cadence-quadspi driver to support\nloopback clock circuit, pm_runtime support and tweaks for 66AK2G SoC.\n\nChange log:\n\nv3:\n* Fix build warnings reported by kbuild test bot.\n\nResend:\n* Rebase to latest linux-next.\n* Collect Acked-bys\n\nv2:\n* Drop DT patches. Will be sent as separate series as requested by\n maintainer.\n* Split binding docs into separate patches.\n* Address comments by Rob Herring.\n\n\nVignesh R (5):\n mtd: spi-nor: cadence-quadspi: Add TI 66AK2G SoC specific compatible\n mtd: spi-nor: cadence-quadspi: add a delay in write sequence\n mtd: spi-nor: cadence-quadspi: Add new binding to enable loop-back\n circuit\n mtd: spi-nor: cadence-quadspi: Add support to enable loop-back clock\n circuit\n mtd: spi-nor: cadence-quadspi: Add runtime PM support\n\n .../devicetree/bindings/mtd/cadence-quadspi.txt | 7 +++-\n drivers/mtd/spi-nor/cadence-quadspi.c | 46 ++++++++++++++++++++--\n 2 files changed, 49 insertions(+), 4 deletions(-)"}