{"id":816037,"url":"http://patchwork.ozlabs.org/api/covers/816037/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/cover/1505888909-98816-1-git-send-email-david.wu@rock-chips.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505888909-98816-1-git-send-email-david.wu@rock-chips.com>","list_archive_url":null,"date":"2017-09-20T06:28:15","name":"[U-Boot,v3,00/14] Add rockchip SARADC support","submitter":{"id":68083,"url":"http://patchwork.ozlabs.org/api/people/68083/?format=json","name":"David Wu","email":"david.wu@rock-chips.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/cover/1505888909-98816-1-git-send-email-david.wu@rock-chips.com/mbox/","series":[{"id":4030,"url":"http://patchwork.ozlabs.org/api/series/4030/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=4030","date":"2017-09-20T06:28:15","name":"Add rockchip SARADC support","version":3,"mbox":"http://patchwork.ozlabs.org/series/4030/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/816037/comments/","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxqbQ2DlCz9sPs\n\tfor ;\n\tWed, 20 Sep 2017 16:29:36 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 532A2C21DF3; Wed, 20 Sep 2017 06:29:24 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 4DDC5C21C50;\n\tWed, 20 Sep 2017 06:29:22 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 34F8DC21C59; Wed, 20 Sep 2017 06:29:20 +0000 (UTC)","from lucky1.263xmail.com (lucky1.263xmail.com [211.157.147.131])\n\tby lists.denx.de (Postfix) with ESMTPS id 897B7C21C35\n\tfor ; Wed, 20 Sep 2017 06:29:19 +0000 (UTC)","from david.wu?rock-chips.com (unknown [192.168.167.224])\n\tby lucky1.263xmail.com (Postfix) with ESMTP id 518C58FB39;\n\tWed, 20 Sep 2017 14:29:15 +0800 (CST)","from localhost.localdomain (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id A5DAF3B5;\n\tWed, 20 Sep 2017 14:29:14 +0800 (CST)","from localhost.localdomain (unknown [58.22.7.114])\n\tby smtp.263.net (Postfix) whith ESMTP id 13379H8TGDD;\n\tWed, 20 Sep 2017 14:29:15 +0800 (CST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.6 required=5.0 tests=RCVD_IN_MSPIKE_BL,\n\tRCVD_IN_MSPIKE_L4,RCVD_IN_SORBS_WEB autolearn=no autolearn_force=no\n\tversion=3.4.0","X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"1","X-MAIL-DELIVERY":"0","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"david.wu@rock-chips.com","X-FST-TO":"philipp.tomsich@theobroma-systems.com","X-SENDER-IP":"58.22.7.114","X-LOGIN-NAME":"david.wu@rock-chips.com","X-UNIQUE-TAG":"<888242c9d994c2533face453d2012bc9>","X-ATTACHMENT-NUM":"0","X-SENDER":"wdc@rock-chips.com","X-DNS-TYPE":"0","From":"David Wu ","To":"philipp.tomsich@theobroma-systems.com,\n\tsjg@chromium.org","Date":"Wed, 20 Sep 2017 14:28:15 +0800","Message-Id":"<1505888909-98816-1-git-send-email-david.wu@rock-chips.com>","X-Mailer":"git-send-email 2.7.4","Cc":"huangtao@rock-chips.com, zhangqing@rock-chips.com, u-boot@lists.denx.de, \n\tdavid.wu@rock-chips.com, andy.yan@rock-chips.com, chenjh@rock-chips.com","Subject":"[U-Boot] [PATCH v3 00/14] Add rockchip SARADC support","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"The SARADC is used for adc keys and charging detect at uboot\nloader. Except for the rk3036 and rk3228 Socs, the others\nsupport the SARADC IP.\n\nChanges in v3:\n- Add commit message\n- Add commit message\n- Add commit message\n- Add commit message\n- Add commit message\n- Add commit message\n\nChanges in v2:\n- Order the the include file\n- Use structures for I/O access\n- Use dev_read_add\n- Add the ROCKCHIP_SARADC config at other rockchip defconfigs like evb-px5...\n- Use bitfield_extract\n- Use GENMASK\n- Use bitfield_extract\n- Use GENMASK\n- Use bitfield_extract\n- Use GENMASK\n- Use GENMASK\n- Use GENMASK\n\nDavid Wu (14):\n dm: adc: Add driver for Rockchip SARADC\n rockchip: configs: Enable the ROCKCHIP_SARADC config\n rockchip: clk: Add rv1108 SARADC clock support\n rockchip: clk: Add SARADC clock support for rk3288\n rockchip: clk: Add rk3328 SARADC clock support\n rockchip: clk: Add rk3368 SARADC clock support\n rockchip: clk: Add rk3399 SARADC clock support\n rockchip: dts: rv1108: Add SARADC node at dtsi level\n rockchip: dts: Enable SARADC for rv1108-evb\n rockchip: dts: Enable SARADC for rk3288-popmetal\n rockchip: dts: Enable SARADC for rk3328-evb\n rockchip: dts: Enable SARADC for rk3368-px5-evb\n rockchip: dts: Enable SARADC for rk3368-sheep\n rockchip: dts: Enable SARADC for rk3399-evb\n\n arch/arm/dts/rk3288-popmetal.dtsi | 4 +\n arch/arm/dts/rk3328-evb.dts | 4 +\n arch/arm/dts/rk3368-px5-evb.dts | 4 +\n arch/arm/dts/rk3368-sheep.dts | 4 +\n arch/arm/dts/rk3399-evb.dts | 4 +\n arch/arm/dts/rv1108-evb.dts | 4 +\n arch/arm/dts/rv1108.dtsi | 11 ++\n arch/arm/include/asm/arch-rockchip/cru_rk3368.h | 5 +\n arch/arm/include/asm/arch-rockchip/cru_rv1108.h | 5 +\n configs/chromebit_mickey_defconfig | 2 +\n configs/chromebook_jerry_defconfig | 2 +\n configs/chromebook_minnie_defconfig | 2 +\n configs/evb-px5_defconfig | 2 +\n configs/evb-rk3288_defconfig | 2 +\n configs/evb-rk3328_defconfig | 2 +\n configs/evb-rk3399_defconfig | 2 +\n configs/evb-rv1108_defconfig | 2 +\n configs/fennec-rk3288_defconfig | 2 +\n configs/firefly-rk3288_defconfig | 2 +\n configs/firefly-rk3399_defconfig | 2 +\n configs/geekbox_defconfig | 2 +\n configs/lion-rk3368_defconfig | 2 +\n configs/miqi-rk3288_defconfig | 2 +\n configs/phycore-rk3288_defconfig | 2 +\n configs/popmetal-rk3288_defconfig | 2 +\n configs/puma-rk3399_defconfig | 2 +\n configs/rock2_defconfig | 2 +\n configs/rock_defconfig | 2 +\n configs/sheep-rk3368_defconfig | 2 +\n configs/tinker-rk3288_defconfig | 2 +\n drivers/adc/Kconfig | 9 ++\n drivers/adc/Makefile | 1 +\n drivers/adc/rockchip-saradc.c | 183 ++++++++++++++++++++++++\n drivers/clk/rockchip/clk_rk3288.c | 41 ++++++\n drivers/clk/rockchip/clk_rk3328.c | 35 ++++-\n drivers/clk/rockchip/clk_rk3368.c | 32 +++++\n drivers/clk/rockchip/clk_rk3399.c | 36 ++++-\n drivers/clk/rockchip/clk_rv1108.c | 33 ++++-\n include/dt-bindings/clock/rv1108-cru.h | 2 +\n 39 files changed, 456 insertions(+), 3 deletions(-)\n create mode 100644 drivers/adc/rockchip-saradc.c"}