{"id":815236,"url":"http://patchwork.ozlabs.org/api/covers/815236/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-imx/cover/20170919010000.32072-1-opendmb@gmail.com/","project":{"id":19,"url":"http://patchwork.ozlabs.org/api/projects/19/?format=json","name":"Linux IMX development","link_name":"linux-imx","list_id":"linux-imx-kernel.lists.patchwork.ozlabs.org","list_email":"linux-imx-kernel@lists.patchwork.ozlabs.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170919010000.32072-1-opendmb@gmail.com>","list_archive_url":null,"date":"2017-09-19T00:59:57","name":"[v4,0/3] Add support for BCM7271 style interrupt controller","submitter":{"id":71144,"url":"http://patchwork.ozlabs.org/api/people/71144/?format=json","name":"Doug Berger","email":"opendmb@gmail.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-imx/cover/20170919010000.32072-1-opendmb@gmail.com/mbox/","series":[{"id":3763,"url":"http://patchwork.ozlabs.org/api/series/3763/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-imx/list/?series=3763","date":"2017-09-19T00:59:57","name":"Add support for BCM7271 style interrupt controller","version":4,"mbox":"http://patchwork.ozlabs.org/series/3763/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/815236/comments/","headers":{"Return-Path":"<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id;\n\tbh=CpC7g0CclT8mwnuiOWDHAN5ovNQTTbHi0jhb/xfjshw=;\n\tb=Vo1GFmkbOZ6A9+t6uiXOeI8Xaj66scKcTIhQ0uPgIT22PxJRzxCsbpD6WK4WnMaR8c\n\tJEdky568EeawrKb47fGGF8c/VlcxWiWfX5Js0+t/dhGd3b7owYoTm/du1fhUpa/e8Gke\n\tdJCj0SuTSSevpuYL+nRPEo9Yv2Y+X1omxngp5zKlTCx4LHqAn0he4AmI5H0tnsJqDQ9k\n\tytVdEWZBl8j+YNJBy+7IvDgVk5e7Hbj8ACf5Goalx1C+HLWgauMrV9j1g+tJu8JUNZsT\n\tLQdFdQcN2SR2kSvPB6Db8o1odx6sOC6GC2qsN1OpeFYgJ1QOi6kEy8M56BlCUVgWVSRz\n\tBB8w==","X-Gm-Message-State":"AHPjjUicy6nF3hPxl0MA4RF1QZ9oDBWQNnxYawuFTMkXmbGPqDqTczij\n\tY6Kdn9vM+XzerQ==","X-Google-Smtp-Source":"AOwi7QC3RQJuO7w7i0FprrrlpD1AXudUTrBb/bsSKA6eFlG2xzU4XpgAJLMXey5BcYzkWZNXHK9l/Q==","X-Received":"by 10.200.35.21 with SMTP id a21mr44883807qta.215.1505782817204; \n\tMon, 18 Sep 2017 18:00:17 -0700 (PDT)","From":"Doug Berger <opendmb@gmail.com>","To":"Thomas Gleixner <tglx@linutronix.de>","Subject":"[PATCH v4 0/3] Add support for BCM7271 style interrupt controller","Date":"Mon, 18 Sep 2017 17:59:57 -0700","Message-Id":"<20170919010000.32072-1-opendmb@gmail.com>","X-Mailer":"git-send-email 2.14.1","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170918_180039_442486_6A8B2292 ","X-CRM114-Status":"GOOD (  16.86  )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details:   (-2.0 points)\n\tpts rule name              description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2607:f8b0:400d:c0d:0:0:0:242 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS               SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (opendmb[at]gmail.com)\n\t-1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":"<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>","List-Archive":"<http://lists.infradead.org/pipermail/linux-arm-kernel/>","List-Post":"<mailto:linux-arm-kernel@lists.infradead.org>","List-Help":"<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>","List-Subscribe":"<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>","Cc":"Mark Rutland <mark.rutland@arm.com>, Sebastian Frias <sf84@laposte.net>, \n\tDoug Berger <opendmb@gmail.com>, Jason Cooper <jason@lakedaemon.net>,\n\tlinux-mips@linux-mips.org, Mason <slash.tmp@free.fr>,\n\tMarc Zyngier <marc.zyngier@arm.com>,\n\tBoris Brezillon <boris.brezillon@free-electrons.com>,\n\tBartosz Golaszewski <brgl@bgdev.pl>,\n\tKevin Cernekee <cernekee@gmail.com>, \n\tlinux-kernel@vger.kernel.org, devicetree@vger.kernel.org,\n\tRob Herring <robh+dt@kernel.org>, bcm-kernel-feedback-list@broadcom.com, \n\tGregory Fong <gregory.0xf0@gmail.com>,\n\tFlorian Fainelli <f.fainelli@gmail.com>, \n\tBrian Norris <computersforpeace@gmail.com>,\n\tMans Rullgard <mans@mansr.com>, linux-arm-kernel@lists.infradead.org,\n\tMarc Gonzalez <marc_gonzalez@sigmadesigns.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"},"content":"This patch set extends the functionality of the irq-brcmstb-l2 interrupt\ncontroller driver to cover a hardware variant first introduced in the\nBCM7271 SoC.  The main difference between this variant and the block\nfound in earlier brcmstb SoCs is that this variant only supports level\nsensitive interrupts and therefore does not latch the interrupt state\nbased on edges.  Since there is no longer a need to ack interrupts with\na register write to clear the latch the register map has been changed.\n\nTherefore the change to add support for the new hardware block is to\nabstract the register accesses to accommodate different maps and to\nidentify the block with a new device-tree compatible string.\n\nI also took the opportunity to make some small efficiency enhancements\nto the driver.  One of these was to make use of the slightly more\nefficient irq_mask_ack method.  However, I discovered that the defined\nirq_gc_mask_disable_reg_and_ack() generic irq function was insufficient\nfor my needs.  Previous submissions offered candidate solutions to\naddress my needs within the generic irqchip library, but since those\nsubmissions appear to have stalled I am submitting this version that\nincludes the function in the driver to prevent controversy and allow\nthe new functionality to be included. \n\nChanges in v4:\n\n- The first three commits were removed from the patch set to remove any\n  dependencies on changing the generic irqchip or irqchip-tango imple-\n  mentations. If there is a will to make those changes in the future\n  they can be applied at that time, but they needn't hold up the accept-\n  ance of this patch set.\n  \nChanges in v3:\n\n- I did not submit a v3 patch set, but Marc Gonzalez included a PATCH v3\n  in a response to the v2 patch so I am skipping ahead to v4 to avoid\n  confusion.\n  \nChanges in v2:\n\n- removed unused permutations of irq_mask_ack methods\n- added Reviewed-by and Acked-by responses from first submission\n\nDoug Berger (3):\n  irqchip: brcmstb-l2: Remove some processing from the handler\n  irqchip: brcmstb-l2: Abstract register accesses\n  irqchip: brcmstb-l2: Add support for the BCM7271 L2 controller\n\n .../bindings/interrupt-controller/brcm,l2-intc.txt |   3 +-\n drivers/irqchip/irq-brcmstb-l2.c                   | 171 +++++++++++++++------\n 2 files changed, 126 insertions(+), 48 deletions(-)"}