{"id":812950,"url":"http://patchwork.ozlabs.org/api/covers/812950/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/cover/20170912162513.21694-1-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170912162513.21694-1-richard.henderson@linaro.org>","list_archive_url":null,"date":"2017-09-12T16:24:57","name":"[v2,00/16] TCG vectorization and example conversion","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/cover/20170912162513.21694-1-richard.henderson@linaro.org/mbox/","series":[{"id":2737,"url":"http://patchwork.ozlabs.org/api/series/2737/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2737","date":"2017-09-12T16:24:59","name":"TCG vectorization and example conversion","version":2,"mbox":"http://patchwork.ozlabs.org/series/2737/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/812950/comments/","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400e:c00::231","Subject":"[Qemu-devel] [PATCH v2 00/16] TCG vectorization and example\n\tconversion","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"alex.bennee@linaro.org, f4bug@amsat.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"I haven't gotten so far as the complex vector op issue that came\nup in conversation with Alex this week. But this is what I was\ntargeting as v2:\n\n * Add documentation. Enough, or is it still lacking?\n * Fixed the bug in tcg/i386 that affected BIC.\n * Fill in the host vector ops for aarch64.\n\n\nr~\n\n\nRichard Henderson (16):\n tcg: Add expanders for out-of-line vector helpers\n tcg: Add types for host vectors\n tcg: Add operations for host vectors\n tcg: Add tcg_op_supported\n tcg: Add INDEX_op_invalid\n tcg: Add vector infrastructure and ops for add/sub/logic\n target/arm: Align vector registers\n target/arm: Use vector infrastructure for aa64 add/sub/logic\n tcg/i386: Add vector operations\n tcg/aarch64: Fully convert tcg_target_op_def\n tcg: Remove tcg_regset_clear\n tcg: Remove tcg_regset_set\n tcg: Remove tcg_regset_{or,and,andnot,not}\n tcg: Remove tcg_regset_set32\n tcg: Fix types in tcg_regset_{set,reset}_reg\n tcg/aarch64: Add vector operations\n\n Makefile.target | 5 +-\n target/arm/cpu.h | 2 +-\n tcg/aarch64/tcg-target.h | 23 +-\n tcg/i386/tcg-target.h | 46 ++-\n tcg/tcg-gvec-desc.h | 49 +++\n tcg/tcg-op-gvec.h | 104 +++++++\n tcg/tcg-opc.h | 91 ++++++\n tcg/tcg-runtime.h | 16 +\n tcg/tcg.h | 46 ++-\n target/arm/translate-a64.c | 137 +++++----\n tcg/aarch64/tcg-target.inc.c | 689 +++++++++++++++++++++++++++++++------------\n tcg/arm/tcg-target.inc.c | 25 +-\n tcg/i386/tcg-target.inc.c | 468 +++++++++++++++++++++++++----\n tcg/mips/tcg-target.inc.c | 2 +-\n tcg/ppc/tcg-target.inc.c | 41 +--\n tcg/s390/tcg-target.inc.c | 22 +-\n tcg/sparc/tcg-target.inc.c | 52 ++--\n tcg/tcg-op-gvec.c | 582 ++++++++++++++++++++++++++++++++++++\n tcg/tcg-runtime-gvec.c | 192 ++++++++++++\n tcg/tcg.c | 334 ++++++++++++++++++++-\n tcg/tci/tcg-target.inc.c | 13 +-\n 21 files changed, 2527 insertions(+), 412 deletions(-)\n create mode 100644 tcg/tcg-gvec-desc.h\n create mode 100644 tcg/tcg-op-gvec.h\n create mode 100644 tcg/tcg-op-gvec.c\n create mode 100644 tcg/tcg-runtime-gvec.c"}