{"id":811075,"url":"http://patchwork.ozlabs.org/api/covers/811075/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/cover/1504798409-32041-1-git-send-email-timur@codeaurora.org/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504798409-32041-1-git-send-email-timur@codeaurora.org>","list_archive_url":null,"date":"2017-09-07T15:33:27","name":"[0/2,v5] pinctrl: qcom: add support for sparse GPIOs","submitter":{"id":66858,"url":"http://patchwork.ozlabs.org/api/people/66858/?format=json","name":"Timur Tabi","email":"timur@codeaurora.org"},"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/cover/1504798409-32041-1-git-send-email-timur@codeaurora.org/mbox/","series":[{"id":2018,"url":"http://patchwork.ozlabs.org/api/series/2018/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=2018","date":"2017-09-07T15:33:27","name":"pinctrl: qcom: add support for sparse GPIOs","version":5,"mbox":"http://patchwork.ozlabs.org/series/2018/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/811075/comments/","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=codeaurora.org header.i=@codeaurora.org\n\theader.b=\"coCqj8sn\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key)\n\theader.d=codeaurora.org header.i=@codeaurora.org\n\theader.b=\"DYwQAA8l\"; dkim-atps=neutral","pdx-caf-mail.web.codeaurora.org;\n\tdmarc=none (p=none dis=none)\n\theader.from=codeaurora.org","pdx-caf-mail.web.codeaurora.org;\n\tspf=none smtp.mailfrom=timur@codeaurora.org"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xp4HM1zX6z9t2v\n\tfor ;\n\tFri, 8 Sep 2017 01:33:51 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754745AbdIGPdu (ORCPT );\n\tThu, 7 Sep 2017 11:33:50 -0400","from smtp.codeaurora.org ([198.145.29.96]:47104 \"EHLO\n\tsmtp.codeaurora.org\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752200AbdIGPdt (ORCPT\n\t); Thu, 7 Sep 2017 11:33:49 -0400","by smtp.codeaurora.org (Postfix, from userid 1000)\n\tid 6AB5C60D6E; Thu, 7 Sep 2017 15:33:48 +0000 (UTC)","from timur-ubuntu.qualcomm.com (i-global254.qualcomm.com\n\t[199.106.103.254])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\t(Authenticated sender: timur@smtp.codeaurora.org)\n\tby smtp.codeaurora.org (Postfix) with ESMTPSA id DF21D60C17;\n\tThu, 7 Sep 2017 15:33:46 +0000 (UTC)"],"DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1504798428;\n\tbh=DnOYQOtu7/8VOh+8KzDw1rQCK0tl42QVWk15zvQS2Uk=;\n\th=From:To:Cc:Subject:Date:From;\n\tb=coCqj8snNliP4WLKB99q4Tj6OzY8cQ/qsmm5EadJAGaNjX9Ucoihtj454mFFmpVhI\n\te5rcypX9JS3xZHDB8VNbVermNLb87P5U9+mPOw83Wp5dhdeelfdIbuDp8o9nrtj87f\n\ttimGBRrBJTMv9l8PlrGe+2mhm88unjKDWwNRj8ZE=","v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1504798427;\n\tbh=DnOYQOtu7/8VOh+8KzDw1rQCK0tl42QVWk15zvQS2Uk=;\n\th=From:To:Cc:Subject:Date:From;\n\tb=DYwQAA8lbhdZuu2vt7/D9KMrOjQUx3ggwOeVn7gKMZbNY//T021/sNjWWq7kBveLQ\n\tkEsHBaOENTdkj92rrgJn0cly8ABlB/oHX150+LmRQmt1QTvv8krvDeBZpftWNliAet\n\t3OerMyFs/Qherd59B0mp/wtxBkbPHpvMjcJWQuaE="],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tpdx-caf-mail.web.codeaurora.org","X-Spam-Level":"","X-Spam-Status":"No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00,\n\tDKIM_SIGNED,\n\tT_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0","DMARC-Filter":"OpenDMARC Filter v1.3.2 smtp.codeaurora.org DF21D60C17","From":"Timur Tabi ","To":"Linus Walleij , andy.gross@linaro.org,\n\tdavid.brown@linaro.org, anjiandi@codeaurora.org,\n\tBjorn Andersson ,\n\tlinux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-arm-msm@vger.kernel.org","Cc":"timur@codeaurora.org","Subject":"[PATCH 0/2] [v5] pinctrl: qcom: add support for sparse GPIOs","Date":"Thu, 7 Sep 2017 10:33:27 -0500","Message-Id":"<1504798409-32041-1-git-send-email-timur@codeaurora.org>","X-Mailer":"git-send-email 1.9.1","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"},"content":"First patch allows for for pinctrl-msm to understand GPIO groups with\nno pins. Such pins are \"hidden\" and can't be exported or accessed.\n\nSecond patch updates the QDF2xxx driver to take advantage of all that.\n\nv5:\n Since gpiochip_add_data no longer requests GPIOs before scanning for\n the direction (that patch was reverted), pinctrl-msm.c now specifically\n checks for special case.\n\n Also added msm_gpio_get_next_range() to reduce the number of pin\n ranges registered.\n\nTimur Tabi (2):\n [v5] pinctrl: qcom: disable GPIO groups with no pins\n [v3] pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002\n\n drivers/pinctrl/qcom/pinctrl-msm.c | 110 +++++++++++++++++++++++--\n drivers/pinctrl/qcom/pinctrl-msm.h | 2 +\n drivers/pinctrl/qcom/pinctrl-qdf2xxx.c | 145 +++++++++++++++++++++++++--------\n 3 files changed, 215 insertions(+), 42 deletions(-)"}