{"id":2231236,"url":"http://patchwork.ozlabs.org/api/covers/2231236/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/cover/20260430122602.126722-1-aleksandr.loktionov@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430122602.126722-1-aleksandr.loktionov@intel.com>","list_archive_url":null,"date":"2026-04-30T12:25:57","name":"[0/5] ice: five small fixes and cleanups","submitter":{"id":75597,"url":"http://patchwork.ozlabs.org/api/people/75597/?format=json","name":"Aleksandr Loktionov","email":"aleksandr.loktionov@intel.com"},"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/cover/20260430122602.126722-1-aleksandr.loktionov@intel.com/mbox/","series":[{"id":502294,"url":"http://patchwork.ozlabs.org/api/series/502294/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=502294","date":"2026-04-30T12:25:58","name":"ice: five small fixes and cleanups","version":1,"mbox":"http://patchwork.ozlabs.org/series/502294/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2231236/comments/","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=S4SNu1Pi;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::138; 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a=\"78689180\"","E=Sophos;i=\"6.23,208,1770624000\"; d=\"scan'208\";a=\"78689180\"","E=Sophos;i=\"6.23,208,1770624000\"; d=\"scan'208\";a=\"233538420\""],"X-ExtLoop1":"1","From":"Aleksandr Loktionov ","To":"intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com,\n aleksandr.loktionov@intel.com","Cc":"netdev@vger.kernel.org","Date":"Thu, 30 Apr 2026 14:25:57 +0200","Message-ID":"<20260430122602.126722-1-aleksandr.loktionov@intel.com>","X-Mailer":"git-send-email 2.52.0","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777551966; x=1809087966;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=WoSZTJZgD5sk1nHAskzI2NqSbzu34TMeqUl/m7B6ltc=;\n b=kfkkdlyUvYZ9eDx0fsNirBFNL8VB7m+jBjE/9qvzuSO1rRId90zFwjm2\n oEAJNFbSpG3GxKRhL7sssK2KmB7QNRCc0OFtc2gc3QJ/v0iWEsTUjVUHJ\n 6NSrgISbjqT23AN5+B7VXXVC5YJ7uxUWfxYFSFbBGjmOk0wiBSYT7whPF\n Y69+DLciCdyrzduPBNSzp1Nq3rEzsdCYYt9HVfY7Cxaj5tKYCQesbBk8I\n 1NGV/1eZvF+3Vxz/m02Opp8ID8R6dms/to68GkPdtBFl3U6j7GXEk2GrG\n VqQHL4HZemESWEPwjAQR0WSSbVF3bTZWhPrbWkX5k2cb8cT7ZwCISr1K2\n g==;","X-Mailman-Original-Authentication-Results":["smtp2.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp2.osuosl.org;\n dkim=pass (2048-bit key,\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=kfkkdlyU"],"Subject":"[Intel-wired-lan] [PATCH 0/5] ice: five small fixes and cleanups","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "},"content":"Three correctness fixes and two cleanups for the ice driver.\n\nPatch 1 corrects a kernel-doc comment in ice_ptp_hw.h that described the\nETH56G MAC Rx offset field as unsigned when it is signed (trivial doc fix,\nno functional change).\n\nPatch 2 removes the PF_SB_REM_DEV_CTL sideband register write from\nice_ptp_init_phc_e82x(). PHY access is enabled by default on E82X and\nthe register write was a leftover from an earlier SWITCH_MODE workaround\nthat is no longer needed.\n\nPatch 3 renames ICE_SMA2_UFL2_RX_DIS to ICE_SMA2_UFL2_RX_EN to match\nthe actual active-high hardware semantics and inverts the three use sites\nin ice_dpll.c so that the logic remains correct.\n\nPatch 4 replaces the static per-type frequency tables for CGU pins with a\nsingle DPLL_PIN_FREQUENCY_RANGE(1, 25 MHz) entry. The firmware defines\nan any_freq capability for configurable CGU inputs, but the old tables\nrestricted users to 1 PPS or 10 MHz. GNSS pins retain a 1 PPS-only\nentry since they are physically constrained.\n\nPatch 5 exports ice_dcb_need_recfg() and calls it in the four SW LLDP\nnetlink setters instead of memcmp() on a non-packed struct, which is\nundefined behaviour due to uninitialised padding bytes. The redundant\nmemcmp in ice_pf_dcb_cfg() is removed since callers now guard it.\n\nAleksandr Loktionov (2):\n ice: add correct handling of SMA/u.FL states\n ice: use element-by-element comparison for DCB config changes\n\nArkadiusz Kubalewski (1):\n ice: fix DPLL pin frequency range in CGU pin descriptors\n\nKarol Kolacinski (2):\n ice: fix ETH56G Rx offset type description in kernel-doc comment\n ice: remove unnecessary PF_SB_REM_DEV_CTL write for E82X\n\n drivers/net/ethernet/intel/ice/ice_dcb_lib.c | 13 +-\n drivers/net/ethernet/intel/ice/ice_dcb_lib.h | 2 +\n drivers/net/ethernet/intel/ice/ice_dcb_nl.c | 30 +++-\n drivers/net/ethernet/intel/ice/ice_dpll.c | 6 +-\n drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 141 ++++++++++---------\n drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 8 +-\n 6 files changed, 113 insertions(+), 87 deletions(-)"}