{"id":2218988,"url":"http://patchwork.ozlabs.org/api/covers/2218988/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pwm/cover/20260402091718.1608-1-dongxuyang@eswincomputing.com/","project":{"id":38,"url":"http://patchwork.ozlabs.org/api/projects/38/?format=json","name":"Linux PWM development","link_name":"linux-pwm","list_id":"linux-pwm.vger.kernel.org","list_email":"linux-pwm@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260402091718.1608-1-dongxuyang@eswincomputing.com>","list_archive_url":null,"date":"2026-04-02T09:17:18","name":"[v3,0/2] Update designware pwm driver","submitter":{"id":90849,"url":"http://patchwork.ozlabs.org/api/people/90849/?format=json","name":"Xuyang Dong","email":"dongxuyang@eswincomputing.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-pwm/cover/20260402091718.1608-1-dongxuyang@eswincomputing.com/mbox/","series":[{"id":498455,"url":"http://patchwork.ozlabs.org/api/series/498455/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pwm/list/?series=498455","date":"2026-04-02T09:18:54","name":"Update designware pwm driver","version":3,"mbox":"http://patchwork.ozlabs.org/series/498455/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2218988/comments/","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pwm@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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It is\n required to support proper controller initialization when no PWM\n channel is active at boot time, while allowing the driver to skip\n reset deassertion if any channel is already enabled.\n - Driver:\n - Update the boundary value check of tmp in __dwc_pwm_configure_timer()\n for DWC_TIM_CTRL_0N100PWM_EN.\n - Replace 'sizeof(struct dwc_pwm_drvdata)' with\n 'struct_size(data, chips, 1)'.\n - Drop devm_clk_get_enabled() in favor of devm_clk_get() with explicit\n clk_prepare_enable() and clk_disable_unprepare() allowing runtime PM\n to manage clock state.\n - Replace devm_reset_control_get_optional_exclusive_deasserted() with\n devm_reset_control_get_optional_exclusive() and issue a full reset via\n reset_control_reset() only when no PWM channel is active at probe time.\n - Detect bootloader-enabled PWM channels by reading the enable bit, and\n initialize runtime PM as active for those channels by calling\n pm_runtime_set_active() and pm_runtime_get_noresume().\n - Remove autosuspend as it is not required for this driver.\n - Use explicit pm_runtime_enable() and pm_runtime_disable() instead of\n the managed devm_pm_runtime_enable() variant to ensure correct cleanup.\n - On device removal, recheck the channel enable status. If any channel\n remains active, call pm_runtime_put_noidle() before disabling clocks\n via clk_disable_unprepare().\n Resume device before register access during removal if it is runtime\n suspended, and re-suspend it afterward.\n - If device is suspended, resume it before register access during system\n resume/suspend.\n - Use pm_ptr() instead of pm_sleep_ptr() for correct PM operation.\n\n - Link to v2: https://lore.kernel.org/all/20260306093000.2065-1-dongxuyang@eswincomputing.com/\n\n Change in v2:\n - YAML:\n - Remove eswin,eic7700-pwm.yaml. Use snps,dw-apb-timers-pwm2.yaml.\n The description in snps,dw-apb-timers-pwm2.yaml is better.\n - Add the resets property as optional, as defined in the databook.\n - Remove snps,pwm-full-range-enable as no additional property is needed.\n - Driver:\n - Change the file from pwm-dwc-eic7700.c to pwm-dwc-of.c from [1].\n - Define DWC_TIM_VERSION_ID_2_11A 2.11a as the baseline version.\n - Enable the 0% and 100% duty cycle mode by setting dwc->feature if\n the version read from the TIMERS_COMP_VERSION register is later\n than or equal to DWC_TIM_VERSION_ID_2_11A.\n - Use the DIV_ROUND_UP_ULL() to calculate width in the .apply and\n .get_state.\n - Additionally, Power Management (PM) support has been added to the\n pwm-dwc-of.c driver.\n - Drop the headers that are not used.\n - Use devm_clk_get_enabled() instead of devm_clk_get().\n - Drop of_match_ptr.\n - Fix build error with 1ULL << 32.\n Reported-by: kernel test robot \n Closes: https://lore.kernel.org/oe-kbuild-all/202512061720.j31AsgM7-lkp@intel.com/\n\n - Link to v1: https://lore.kernel.org/all/20251205090411.1388-1-dongxuyang@eswincomputing.com/\n - Link to v9: https://lore.kernel.org/lkml/20230907161242.67190-1-ben.dooks@codethink.co.uk/\n\nXuyang Dong (2):\n dt-bindings: pwm: dwc: add reset optional\n pwm: dwc: add of/platform support\n\n .../bindings/pwm/snps,dw-apb-timers-pwm2.yaml | 3 +\n drivers/pwm/Kconfig | 10 +\n drivers/pwm/Makefile | 1 +\n drivers/pwm/pwm-dwc-core.c | 101 ++++--\n drivers/pwm/pwm-dwc-of.c | 331 ++++++++++++++++++\n drivers/pwm/pwm-dwc.h | 25 +-\n 6 files changed, 442 insertions(+), 29 deletions(-)\n create mode 100644 drivers/pwm/pwm-dwc-of.c\n\n--\n2.34.1"}