{"id":2215565,"url":"http://patchwork.ozlabs.org/api/covers/2215565/?format=json","web_url":"http://patchwork.ozlabs.org/project/glibc/cover/20260324191707.3676629-1-sajan.karumanchi@amd.com/","project":{"id":41,"url":"http://patchwork.ozlabs.org/api/projects/41/?format=json","name":"GNU C Library","link_name":"glibc","list_id":"libc-alpha.sourceware.org","list_email":"libc-alpha@sourceware.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260324191707.3676629-1-sajan.karumanchi@amd.com>","list_archive_url":null,"date":"2026-03-24T19:17:06","name":"[v2,0/1] x86_64: Prefer EVEX512 code-path on AMD Zen5 CPUs","submitter":{"id":79912,"url":"http://patchwork.ozlabs.org/api/people/79912/?format=json","name":"Sajan Karumanchi","email":"sajan.karumanchi@gmail.com"},"mbox":"http://patchwork.ozlabs.org/project/glibc/cover/20260324191707.3676629-1-sajan.karumanchi@amd.com/mbox/","series":[{"id":497334,"url":"http://patchwork.ozlabs.org/api/series/497334/?format=json","web_url":"http://patchwork.ozlabs.org/project/glibc/list/?series=497334","date":"2026-03-24T19:17:06","name":"x86_64: Prefer EVEX512 code-path on AMD Zen5 CPUs","version":2,"mbox":"http://patchwork.ozlabs.org/series/497334/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2215565/comments/","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","libc-alpha@sourceware.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","libc-alpha@sourceware.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=hC7gO8t1;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=hC7gO8t1","sourceware.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","sourceware.org; spf=pass smtp.mailfrom=gmail.com","server2.sourceware.org;\n arc=none smtp.remote-ip=2607:f8b0:4864:20::529"],"Received":["from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgKdm5rDHz1y1G\n\tfor ; Wed, 25 Mar 2026 06:21:16 +1100 (AEDT)","from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 991264BB5881\n\tfor ; Tue, 24 Mar 2026 19:21:14 +0000 (GMT)","from mail-pg1-x529.google.com (mail-pg1-x529.google.com\n [IPv6:2607:f8b0:4864:20::529])\n by sourceware.org (Postfix) with ESMTPS id CF2944BA902D\n for ; Tue, 24 Mar 2026 19:20:52 +0000 (GMT)","by mail-pg1-x529.google.com with SMTP id\n 41be03b00d2f7-c73a5473bbdso1882016a12.2\n for ; Tue, 24 Mar 2026 12:20:52 -0700 (PDT)","from aocl-turin-01-9e82.amd.com ([165.204.156.251])\n by smtp.gmail.com with ESMTPSA id\n d9443c01a7336-2b0aefd07c2sm11393005ad.31.2026.03.24.12.20.48\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Tue, 24 Mar 2026 12:20:50 -0700 (PDT)"],"DKIM-Filter":["OpenDKIM Filter v2.11.0 sourceware.org 991264BB5881","OpenDKIM Filter v2.11.0 sourceware.org CF2944BA902D"],"DMARC-Filter":"OpenDMARC Filter v1.4.2 sourceware.org CF2944BA902D","ARC-Filter":"OpenARC Filter v1.0.0 sourceware.org CF2944BA902D","ARC-Seal":"i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774380053; cv=none;\n b=wPwEOWfhDhybUwdev5MeEFQHS+mK7djEjr2F8ymto61BYWR3eMvwN3UwHkLWXmSndpog4rICTceBQN4UVQve5G6CIKL7cYMSb4u/1R3aeXDZoe+x44Rq55UMGHc3FjO+UZu96pDhBMSc1CB5xJRyNqEGgPDn/mxqBlePUhakuCU=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1774380053; c=relaxed/simple;\n bh=aXf1w8p7GlkMC0QK/BLMK7DXezsr1xOFjbl6YFglSnI=;\n h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version;\n b=q1Ijl10wYDF6iRFyGEc/OiDbSjHI044jXAKyXWX/JO3UXmLSCWz+A0AVow4h0qnLDQBqJcYd5HLgD1J1ojBC0a3v9Cy8AbQqjnZWido9iSwPZdhlIuQwVAZhCG0Fm8JJlLXxtwVM5OCD6UBxY3T+aR44JLlZbfpqHsPCsLEspU8=","ARC-Authentication-Results":"i=1; server2.sourceware.org","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20251104; t=1774380052; x=1774984852; darn=sourceware.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=Lxv+VYJjK3/o2/WY7CYid0Uq8f8zSQuY6eF21N7sKiA=;\n b=hC7gO8t11xV1f6wJjXaQVHoV7O49k9SGzQwM28XbWk7okorsa/9JO7VmF1AHc0rSJt\n jiDINbIxwHGyeDT9L6GWNX611J69iZUECb9zlkONOU+TZyLfeYzHtApXDwpuBB+22wBO\n W+hCWzae4tmGKcILf6Erme41HBcFPN0IG6aSa7BjbQqZwrXrBUfhK0MAQ/kYqGRuR5Ae\n 04JKbh09/sYZGFzQ31MO4MCdEeS4vSyDutlgq5LmZBMWJexav0Rx83WvrNmbq/tOtQq4\n rP7CkTl4CPxU5XjP25Afmr7ntYb1yiSyziGKR2fYM19wquKzCEWn0pmvG9Q5NdlFUric\n Ms/Q==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1774380052; x=1774984852;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=Lxv+VYJjK3/o2/WY7CYid0Uq8f8zSQuY6eF21N7sKiA=;\n b=R0aZSxPhjRMUyU0nGe9LM8Uz0m9c3aPmncVieada61Q9oua07yTN44oV/BiKXpHI9V\n TaJjkdZrLT0Win1ANat96E9I0Xr820FqbSa3L5yn9e2dWg2lCSslVGB2sbKudF597204\n 1aZiuHa5oZSJ5Ls4BNxvf5fUaP5y7v5RPwxwAcBxsApOEJ2kDhSAq2fEH9DOkaoij6F8\n kgRdgm6j/LOpCz5GyoH8LGw2ableBF2sCYQA7QS/L9kbZoZJGY4Nmo8ojIXZpaCzNmg2\n OqfNBIIFimgYeJIN4xkB8FQ43cx4jiK70+s6Lmjkfag+VLqoGjmI0AXr/x6yvBEuaODP\n DQNQ==","X-Gm-Message-State":"AOJu0Yx2/D8ht6jO4OhCqpGpRzdK3063hW5o/rjNxD6527ZZgLnR47l5\n JZCzpWaNMmCdvg1BSojnnZ2i8Ki15IOXFeLiTpzRSScYCa9G09gUu9tMtVaQfPOI","X-Gm-Gg":"ATEYQzwpgUNNCo5M0Z2uFQG3f8SQEjpudWBqaR85J/1B49VPlmhYhxaGnv0yTmAGWgG\n JYUTEVfzOCe3zTJoTGmP4A0vGWCdT0V96xL0WIRBIoIciYBZ7+d6sICydIRS+2j+aBN/wwRkLEJ\n 2c3M9m0MMgALLTyI9HGVGGand1rShFALMBMagc/5797V+o7yZnkfqRfzUJ9cbvMPo6rHTSXH39Z\n drcI4cekq94gkSFQ6n5pM9cCmj6DZKEenJ0HQSYiFKNO1kqHj3CJqCZKF7w0WZsD9ksNJiWcgSS\n ECh6nbN2n1jJZ7kmGX5OPFvwwHAivYm8G1CgMEMmH/BULCbkfyP2sFIcGbGS0/oks1xc7nwh0Hw\n BAJ1EJravbDjqnr4RLhPWL7wDJosEJIxpOB4ihhJz2XxWgevomR1ba+qUEvOXIWoQVx81Ol4/uI\n ZswwRMdqg5lY7v7k/A63sO5e0obUPRsgO9G/Ul1R87NSLkEy/GhXDdmTlU/wrW","X-Received":"by 2002:a17:902:ce81:b0:2b0:6f20:8044 with SMTP id\n d9443c01a7336-2b0b0b1a06bmr7443875ad.43.1774380051427;\n Tue, 24 Mar 2026 12:20:51 -0700 (PDT)","From":"Sajan Karumanchi ","X-Google-Original-From":"Sajan Karumanchi ","To":"libc-alpha@sourceware.org,\n\thjl.tools@gmail.com","Cc":"sajan.karumanchi@amd.com, sajan.karumanchi@gmail.com, fweimer@redhat.com,\n goldstein.w.n@gmail.com","Subject":"[PATCH v2 0/1] x86_64: Prefer EVEX512 code-path on AMD Zen5 CPUs","Date":"Tue, 24 Mar 2026 19:17:06 +0000","Message-Id":"<20260324191707.3676629-1-sajan.karumanchi@amd.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260218180907.902116-2-sajan.karumanchi@amd.com>","References":"<20260218180907.902116-2-sajan.karumanchi@amd.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-BeenThere":"libc-alpha@sourceware.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Libc-alpha mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org"},"content":"Hi H.J.Lu,\n\nThis is version 2 of the patch to optimize string and memory functions for\nAMD Zen5 processors by preferring 512-bit EVEX implementations.\n\nChanges since v1:\n\n1. Simplified AVX-512 feature detection in cpu-features.c:\n2. Added tunable support in cpu-tunables.c:\n - Users can now enable/disable Prefer_EVEX512 flag at runtime\n - Syntax: GLIBC_TUNABLES=glibc.cpu.x86_cpu_features.preferred=Prefer_EVEX512\n3. More consistent with existing naming conventions in glibc codebase\n with minimal changes for maintainability.\n\nNo functional changes to the optimization logic itself - the performance\nimprovements and affected functions remain the same as v1.\n\nThank you for your review and consideration.\n\nBest regards,\nSajan Karumanchi\nAMD\n\n\nSajan Karumanchi (1):\n x86_64: Prefer EVEX512 code-path on AMD Zen5 CPUs\n\n sysdeps/x86/cpu-features.c | 8 ++++++++\n sysdeps/x86/cpu-tunables.c | 6 ++++++\n .../cpu-features-preferred_feature_index_1.def | 1 +\n sysdeps/x86_64/multiarch/ifunc-avx2.h | 15 ++++++++++++---\n sysdeps/x86_64/multiarch/ifunc-evex.h | 11 ++++++++++-\n sysdeps/x86_64/multiarch/memchr.c | 1 +\n sysdeps/x86_64/multiarch/strchr.c | 8 +++++++-\n sysdeps/x86_64/multiarch/strchrnul.c | 1 +\n sysdeps/x86_64/multiarch/strlen.c | 1 +\n sysdeps/x86_64/multiarch/strnlen.c | 1 +\n sysdeps/x86_64/multiarch/strrchr.c | 1 +\n 11 files changed, 49 insertions(+), 5 deletions(-)"}