{"id":949190,"url":"http://patchwork.ozlabs.org/api/1.2/patches/949190/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/patch/20180725133152.30898-18-miquel.raynal@bootlin.com/","project":{"id":3,"url":"http://patchwork.ozlabs.org/api/1.2/projects/3/?format=json","name":"Linux MTD development","link_name":"linux-mtd","list_id":"linux-mtd.lists.infradead.org","list_email":"linux-mtd@lists.infradead.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20180725133152.30898-18-miquel.raynal@bootlin.com>","list_archive_url":null,"date":"2018-07-25T13:31:52","name":"[v5,17/17] mtd: rawnand: allocate dynamically ONFI parameters during detection","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"ef7fa8cce0921625d3dbd1f193ad709d5787588c","submitter":{"id":73368,"url":"http://patchwork.ozlabs.org/api/1.2/people/73368/?format=json","name":"Miquel Raynal","email":"miquel.raynal@bootlin.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-mtd/patch/20180725133152.30898-18-miquel.raynal@bootlin.com/mbox/","series":[{"id":57526,"url":"http://patchwork.ozlabs.org/api/1.2/series/57526/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/list/?series=57526","date":"2018-07-25T13:31:36","name":"Allow dynamic allocations during NAND chip identification phase","version":5,"mbox":"http://patchwork.ozlabs.org/series/57526/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/949190/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/949190/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org\n\t(client-ip=2607:7c80:54:e::133; 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h=Sender:\n\tContent-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe:\n\tList-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References:\n\tIn-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID:\n\tContent-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc\n\t:Resent-Message-ID:List-Owner;\n\tbh=Imz5zeBXXJOseIY86xBHSt0Dy7hAJEfdHWot1yGKskk=;\n\tb=RRm9jLQWr+YbqNfXO+i6J4In2e\n\tPtFrwJnVUWludWgXsTqJIMaV32ueVt+PDvdxPdSU6lQfkTsnmM0R/8cKM7apMkoGgdgP1/LKbgtP+\n\tj0dxqGgW8GQ9V3GgwHleUKvAuUadjDHnxMBXLUMR9lnRO33Gmx1Bm5/bLSHzFBOWKkaxEWGXx+0GS\n\tUMpKEjQJzU/PdWEP1tZuSPcvWHHdOmA7/rE0aZ/1WfidrylBJCa6pYl+V7cQTWQGiWpCu7yfgD362\n\toSzScvMr+ZQpkWIv6nWYeQWJxBEZr++RWVFEkIYYghqN6RAQwyuGDkrZhDo1WIstqb5IxQy3+KZ9l\n\tXNuY0P8w==;","X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","From":"Miquel Raynal ","To":"Boris Brezillon ,\n\tRichard Weinberger ,\n\tDavid Woodhouse , \n\tBrian Norris ,\n\tMarek Vasut ","Subject":"[PATCH v5 17/17] mtd: rawnand: allocate dynamically ONFI parameters\n\tduring detection","Date":"Wed, 25 Jul 2018 15:31:52 +0200","Message-Id":"<20180725133152.30898-18-miquel.raynal@bootlin.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20180725133152.30898-1-miquel.raynal@bootlin.com>","References":"<20180725133152.30898-1-miquel.raynal@bootlin.com>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20180725_063238_261371_CDF10503 ","X-CRM114-Status":"GOOD ( 19.63 )","X-Spam-Score":"-0.0 (/)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-0.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [62.4.15.54 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Lucas Stach , Wenyou Yang ,\n\tJosh Wu , Stefan Agner ,\n\tlinux-mtd@lists.infradead.org, Miquel Raynal ","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"},"content":"Now that it is possible to do dynamic allocations during the\nidentification phase, convert the onfi_params structure (which is only\nneeded with ONFI compliant chips) into a pointer that will be allocated\nonly if needed.\n\nSigned-off-by: Miquel Raynal \nReviewed-by: Boris Brezillon \n---\n drivers/mtd/nand/raw/nand_base.c | 54 +++++++++++++++++++++++--------------\n drivers/mtd/nand/raw/nand_micron.c | 6 ++---\n drivers/mtd/nand/raw/nand_timings.c | 12 ++++-----\n include/linux/mtd/rawnand.h | 6 ++---\n 4 files changed, 46 insertions(+), 32 deletions(-)","diff":"diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c\nindex 00e80781124a..d527e448ce19 100644\n--- a/drivers/mtd/nand/raw/nand_base.c\n+++ b/drivers/mtd/nand/raw/nand_base.c\n@@ -5151,6 +5151,8 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)\n {\n \tstruct mtd_info *mtd = nand_to_mtd(chip);\n \tstruct nand_onfi_params *p;\n+\tstruct onfi_params *onfi;\n+\tint onfi_version = 0;\n \tchar id[4];\n \tint i, ret, val;\n \n@@ -5206,21 +5208,19 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)\n \t/* Check version */\n \tval = le16_to_cpu(p->revision);\n \tif (val & ONFI_VERSION_2_3)\n-\t\tchip->parameters.onfi.version = 23;\n+\t\tonfi_version = 23;\n \telse if (val & ONFI_VERSION_2_2)\n-\t\tchip->parameters.onfi.version = 22;\n+\t\tonfi_version = 22;\n \telse if (val & ONFI_VERSION_2_1)\n-\t\tchip->parameters.onfi.version = 21;\n+\t\tonfi_version = 21;\n \telse if (val & ONFI_VERSION_2_0)\n-\t\tchip->parameters.onfi.version = 20;\n+\t\tonfi_version = 20;\n \telse if (val & ONFI_VERSION_1_0)\n-\t\tchip->parameters.onfi.version = 10;\n+\t\tonfi_version = 10;\n \n-\tif (!chip->parameters.onfi.version) {\n+\tif (!onfi_version) {\n \t\tpr_info(\"unsupported ONFI version: %d\\n\", val);\n \t\tgoto free_onfi_param_page;\n-\t} else {\n-\t\tret = 1;\n \t}\n \n \tsanitize_string(p->manufacturer, sizeof(p->manufacturer));\n@@ -5257,7 +5257,7 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)\n \tif (p->ecc_bits != 0xff) {\n \t\tchip->ecc_strength_ds = p->ecc_bits;\n \t\tchip->ecc_step_ds = 512;\n-\t} else if (chip->parameters.onfi.version >= 21 &&\n+\t} else if (onfi_version >= 21 &&\n \t\t(le16_to_cpu(p->features) & ONFI_FEATURE_EXT_PARAM_PAGE)) {\n \n \t\t/*\n@@ -5284,19 +5284,33 @@ static int nand_flash_detect_onfi(struct nand_chip *chip)\n \t\tbitmap_set(chip->parameters.set_feature_list,\n \t\t\t ONFI_FEATURE_ADDR_TIMING_MODE, 1);\n \t}\n-\tchip->parameters.onfi.tPROG = le16_to_cpu(p->t_prog);\n-\tchip->parameters.onfi.tBERS = le16_to_cpu(p->t_bers);\n-\tchip->parameters.onfi.tR = le16_to_cpu(p->t_r);\n-\tchip->parameters.onfi.tCCS = le16_to_cpu(p->t_ccs);\n-\tchip->parameters.onfi.async_timing_mode =\n-\t\tle16_to_cpu(p->async_timing_mode);\n-\tchip->parameters.onfi.vendor_revision =\n-\t\tle16_to_cpu(p->vendor_revision);\n-\tmemcpy(chip->parameters.onfi.vendor, p->vendor,\n-\t sizeof(p->vendor));\n \n+\tonfi = kzalloc(sizeof(*onfi), GFP_KERNEL);\n+\tif (!onfi) {\n+\t\tret = -ENOMEM;\n+\t\tgoto free_model;\n+\t}\n+\n+\tonfi->version = onfi_version;\n+\tonfi->tPROG = le16_to_cpu(p->t_prog);\n+\tonfi->tBERS = le16_to_cpu(p->t_bers);\n+\tonfi->tR = le16_to_cpu(p->t_r);\n+\tonfi->tCCS = le16_to_cpu(p->t_ccs);\n+\tonfi->async_timing_mode = le16_to_cpu(p->async_timing_mode);\n+\tonfi->vendor_revision = le16_to_cpu(p->vendor_revision);\n+\tmemcpy(onfi->vendor, p->vendor, sizeof(p->vendor));\n+\tchip->parameters.onfi = onfi;\n+\n+\t/* Identification done, free the full ONFI parameter page and exit */\n+\tkfree(p);\n+\n+\treturn 1;\n+\n+free_model:\n+\tkfree(chip->parameters.model);\n free_onfi_param_page:\n \tkfree(p);\n+\n \treturn ret;\n }\n \n@@ -5693,7 +5707,6 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)\n \t\t}\n \t}\n \n-\tchip->parameters.onfi.version = 0;\n \tif (!type->name || !type->pagesize) {\n \t\t/* Check if the chip is ONFI compliant */\n \t\tret = nand_flash_detect_onfi(chip);\n@@ -6031,6 +6044,7 @@ static int nand_scan_ident(struct mtd_info *mtd, int maxchips,\n static void nand_scan_ident_cleanup(struct nand_chip *chip)\n {\n \tkfree(chip->parameters.model);\n+\tkfree(chip->parameters.onfi);\n }\n \n static int nand_set_ecc_soft_ops(struct mtd_info *mtd)\ndiff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c\nindex 656947d91841..fa3e0f423774 100644\n--- a/drivers/mtd/nand/raw/nand_micron.c\n+++ b/drivers/mtd/nand/raw/nand_micron.c\n@@ -88,9 +88,9 @@ static int micron_nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)\n static int micron_nand_onfi_init(struct nand_chip *chip)\n {\n \tstruct nand_parameters *p = &chip->parameters;\n-\tstruct nand_onfi_vendor_micron *micron = (void *)p->onfi.vendor;\n+\tstruct nand_onfi_vendor_micron *micron = (void *)p->onfi->vendor;\n \n-\tif (chip->parameters.onfi.version && p->onfi.vendor_revision) {\n+\tif (p->onfi) {\n \t\tchip->read_retries = micron->read_retry_options;\n \t\tchip->setup_read_retry = micron_nand_setup_read_retry;\n \t}\n@@ -382,7 +382,7 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip)\n \tu8 id[5];\n \tint ret;\n \n-\tif (!chip->parameters.onfi.version)\n+\tif (!chip->parameters.onfi)\n \t\treturn MICRON_ON_DIE_UNSUPPORTED;\n \n \tif (chip->bits_per_cell != 1)\ndiff --git a/drivers/mtd/nand/raw/nand_timings.c b/drivers/mtd/nand/raw/nand_timings.c\nindex 9bb599106a31..ebc7b5f76f77 100644\n--- a/drivers/mtd/nand/raw/nand_timings.c\n+++ b/drivers/mtd/nand/raw/nand_timings.c\n@@ -294,6 +294,7 @@ int onfi_fill_data_interface(struct nand_chip *chip,\n \t\t\t int timing_mode)\n {\n \tstruct nand_data_interface *iface = &chip->data_interface;\n+\tstruct onfi_params *onfi = chip->parameters.onfi;\n \n \tif (type != NAND_SDR_IFACE)\n \t\treturn -EINVAL;\n@@ -308,17 +309,16 @@ int onfi_fill_data_interface(struct nand_chip *chip,\n \t * tPROG, tBERS, tR and tCCS.\n \t * These information are part of the ONFI parameter page.\n \t */\n-\tif (chip->parameters.onfi.version) {\n-\t\tstruct nand_parameters *params = &chip->parameters;\n+\tif (onfi) {\n \t\tstruct nand_sdr_timings *timings = &iface->timings.sdr;\n \n \t\t/* microseconds -> picoseconds */\n-\t\ttimings->tPROG_max = 1000000ULL * params->onfi.tPROG;\n-\t\ttimings->tBERS_max = 1000000ULL * params->onfi.tBERS;\n-\t\ttimings->tR_max = 1000000ULL * params->onfi.tR;\n+\t\ttimings->tPROG_max = 1000000ULL * onfi->tPROG;\n+\t\ttimings->tBERS_max = 1000000ULL * onfi->tBERS;\n+\t\ttimings->tR_max = 1000000ULL * onfi->tR;\n \n \t\t/* nanoseconds -> picoseconds */\n-\t\ttimings->tCCS_min = 1000UL * params->onfi.tCCS;\n+\t\ttimings->tCCS_min = 1000UL * onfi->tCCS;\n \t} else {\n \t\tstruct nand_sdr_timings *timings = &iface->timings.sdr;\n \t\t/*\ndiff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h\nindex 4848c00f3eda..3e79c5637b05 100644\n--- a/include/linux/mtd/rawnand.h\n+++ b/include/linux/mtd/rawnand.h\n@@ -482,7 +482,7 @@ struct nand_parameters {\n \tDECLARE_BITMAP(get_feature_list, ONFI_FEATURE_NUMBER);\n \n \t/* ONFI parameters */\n-\tstruct onfi_params onfi;\n+\tstruct onfi_params *onfi;\n };\n \n /* The maximum expected count of bytes in the NAND ID sequence */\n@@ -1612,10 +1612,10 @@ struct platform_nand_data {\n /* return the supported asynchronous timing mode. */\n static inline int onfi_get_async_timing_mode(struct nand_chip *chip)\n {\n-\tif (!chip->parameters.onfi.version)\n+\tif (!chip->parameters.onfi)\n \t\treturn ONFI_TIMING_MODE_UNKNOWN;\n \n-\treturn chip->parameters.onfi.async_timing_mode;\n+\treturn chip->parameters.onfi->async_timing_mode;\n }\n \n int onfi_fill_data_interface(struct nand_chip *chip,\n","prefixes":["v5","17/17"]}