{"id":834181,"url":"http://patchwork.ozlabs.org/api/1.2/patches/834181/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/20171104085030.25430-5-saeedm@mellanox.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/1.2/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20171104085030.25430-5-saeedm@mellanox.com>","list_archive_url":null,"date":"2017-11-04T08:50:22","name":"[net-next,04/12] net/mlx5: QPTS and QPDPM register firmware command support","commit_ref":null,"pull_url":null,"state":"superseded","archived":true,"hash":"910f7dcddac790dee1ba653993eb5074bd353e2f","submitter":{"id":65299,"url":"http://patchwork.ozlabs.org/api/1.2/people/65299/?format=json","name":"Saeed Mahameed","email":"saeedm@mellanox.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/1.2/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20171104085030.25430-5-saeedm@mellanox.com/mbox/","series":[{"id":11869,"url":"http://patchwork.ozlabs.org/api/1.2/series/11869/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=11869","date":"2017-11-04T08:50:18","name":"[net-next,01/12] net/dcb: Add dscp to priority selector type","version":1,"mbox":"http://patchwork.ozlabs.org/series/11869/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/834181/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/834181/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yTXdn1vpLz9sBW\n\tfor ;\n\tSat, 4 Nov 2017 19:52:45 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1756481AbdKDIwJ (ORCPT );\n\tSat, 4 Nov 2017 04:52:09 -0400","from mail-il-dmz.mellanox.com ([193.47.165.129]:54464 \"EHLO\n\tmellanox.co.il\" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org\n\twith ESMTP id S1755945AbdKDIwA (ORCPT\n\t); Sat, 4 Nov 2017 04:52:00 -0400","from Internal Mail-Server by MTLPINE1 (envelope-from\n\tsaeedm@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 4 Nov 2017 10:51:55 +0200","from mti-swat15.mti.labs.mlnx. (mti-swat15.mti.labs.mlnx\n\t[10.20.1.123])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id vA48pkiS022678;\n\tSat, 4 Nov 2017 10:51:54 +0200"],"From":"Saeed Mahameed ","To":"\"David S. Miller\" ","Cc":"netdev@vger.kernel.org, Huy Nguyen ,\n\tSaeed Mahameed ","Subject":"[net-next 04/12] net/mlx5: QPTS and QPDPM register firmware command\n\tsupport","Date":"Sat, 4 Nov 2017 01:50:22 -0700","Message-Id":"<20171104085030.25430-5-saeedm@mellanox.com>","X-Mailer":"git-send-email 2.14.2","In-Reply-To":"<20171104085030.25430-1-saeedm@mellanox.com>","References":"<20171104085030.25430-1-saeedm@mellanox.com>","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"From: Huy Nguyen \n\nThe QPTS register allows changing the priority trust state between pcp and\ndscp. Add support to get/set trust state from device. When the port is\nin pcp/dscp trust state, packet is routed by hardware to matching priority\nbased on its pcp/dscp value respectively.\n\nThe QPDPM register allow channing the dscp to priority mapping. Add support\nto get/set dscp to priority mapping from device.\nNote that to change a dscp mapping, the \"e\" bit of this dscp structure\nmust be set in the QPDPM firmware command.\n\nSigned-off-by: Huy Nguyen \nReviewed-by: Parav Pandit \nSigned-off-by: Saeed Mahameed \n---\n drivers/net/ethernet/mellanox/mlx5/core/port.c | 99 ++++++++++++++++++++++++++\n include/linux/mlx5/driver.h | 7 ++\n include/linux/mlx5/mlx5_ifc.h | 20 ++++++\n include/linux/mlx5/port.h | 5 ++\n 4 files changed, 131 insertions(+)","diff":"diff --git a/drivers/net/ethernet/mellanox/mlx5/core/port.c b/drivers/net/ethernet/mellanox/mlx5/core/port.c\nindex b6553be841f9..c37d00cd472a 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/port.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/port.c\n@@ -971,3 +971,102 @@ int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode)\n \treturn mlx5_core_access_reg(mdev, in, sizeof(in), out,\n \t\t\t\t sizeof(out), MLX5_REG_MTPPSE, 0, 1);\n }\n+\n+int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state)\n+{\n+\tu32 out[MLX5_ST_SZ_DW(qpts_reg)] = {};\n+\tu32 in[MLX5_ST_SZ_DW(qpts_reg)] = {};\n+\tint err;\n+\n+\tMLX5_SET(qpts_reg, in, local_port, 1);\n+\tMLX5_SET(qpts_reg, in, trust_state, trust_state);\n+\n+\terr = mlx5_core_access_reg(mdev, in, sizeof(in), out,\n+\t\t\t\t sizeof(out), MLX5_REG_QPTS, 0, 1);\n+\treturn err;\n+}\n+\n+int mlx5_query_trust_state(struct mlx5_core_dev *mdev, u8 *trust_state)\n+{\n+\tu32 out[MLX5_ST_SZ_DW(qpts_reg)] = {};\n+\tu32 in[MLX5_ST_SZ_DW(qpts_reg)] = {};\n+\tint err;\n+\n+\tMLX5_SET(qpts_reg, in, local_port, 1);\n+\n+\terr = mlx5_core_access_reg(mdev, in, sizeof(in), out,\n+\t\t\t\t sizeof(out), MLX5_REG_QPTS, 0, 0);\n+\tif (!err)\n+\t\t*trust_state = MLX5_GET(qpts_reg, out, trust_state);\n+\n+\treturn err;\n+}\n+\n+int mlx5_set_dscp2prio(struct mlx5_core_dev *mdev, u8 dscp, u8 prio)\n+{\n+\tint sz = MLX5_ST_SZ_BYTES(qpdpm_reg);\n+\tvoid *qpdpm_dscp;\n+\tvoid *out;\n+\tvoid *in;\n+\tint err;\n+\n+\tin = kzalloc(sz, GFP_KERNEL);\n+\tout = kzalloc(sz, GFP_KERNEL);\n+\tif (!in || !out) {\n+\t\terr = -ENOMEM;\n+\t\tgoto out;\n+\t}\n+\n+\tMLX5_SET(qpdpm_reg, in, local_port, 1);\n+\terr = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_QPDPM, 0, 0);\n+\tif (err)\n+\t\tgoto out;\n+\n+\tmemcpy(in, out, sz);\n+\tMLX5_SET(qpdpm_reg, in, local_port, 1);\n+\n+\t/* Update the corresponding dscp entry */\n+\tqpdpm_dscp = MLX5_ADDR_OF(qpdpm_reg, in, dscp[dscp]);\n+\tMLX5_SET16(qpdpm_dscp_reg, qpdpm_dscp, prio, prio);\n+\tMLX5_SET16(qpdpm_dscp_reg, qpdpm_dscp, e, 1);\n+\terr = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_QPDPM, 0, 1);\n+\n+out:\n+\tkfree(in);\n+\tkfree(out);\n+\treturn err;\n+}\n+\n+/* dscp2prio[i]: priority that dscp i mapped to */\n+#define MLX5E_SUPPORTED_DSCP 64\n+int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio)\n+{\n+\tint sz = MLX5_ST_SZ_BYTES(qpdpm_reg);\n+\tvoid *qpdpm_dscp;\n+\tvoid *out;\n+\tvoid *in;\n+\tint err;\n+\tint i;\n+\n+\tin = kzalloc(sz, GFP_KERNEL);\n+\tout = kzalloc(sz, GFP_KERNEL);\n+\tif (!in || !out) {\n+\t\terr = -ENOMEM;\n+\t\tgoto out;\n+\t}\n+\n+\tMLX5_SET(qpdpm_reg, in, local_port, 1);\n+\terr = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_QPDPM, 0, 0);\n+\tif (err)\n+\t\tgoto out;\n+\n+\tfor (i = 0; i < (MLX5E_SUPPORTED_DSCP); i++) {\n+\t\tqpdpm_dscp = MLX5_ADDR_OF(qpdpm_reg, out, dscp[i]);\n+\t\tdscp2prio[i] = MLX5_GET16(qpdpm_dscp_reg, qpdpm_dscp, prio);\n+\t}\n+\n+out:\n+\tkfree(in);\n+\tkfree(out);\n+\treturn err;\n+}\ndiff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h\nindex ed5be52282ea..a886b51511ab 100644\n--- a/include/linux/mlx5/driver.h\n+++ b/include/linux/mlx5/driver.h\n@@ -107,8 +107,10 @@ enum {\n };\n \n enum {\n+\tMLX5_REG_QPTS = 0x4002,\n \tMLX5_REG_QETCR\t\t = 0x4005,\n \tMLX5_REG_QTCT\t\t = 0x400a,\n+\tMLX5_REG_QPDPM = 0x4013,\n \tMLX5_REG_QCAM = 0x4019,\n \tMLX5_REG_DCBX_PARAM = 0x4020,\n \tMLX5_REG_DCBX_APP = 0x4021,\n@@ -142,6 +144,11 @@ enum {\n \tMLX5_REG_MCAM\t\t = 0x907f,\n };\n \n+enum mlx5_qpts_trust_state {\n+\tMLX5_QPTS_TRUST_PCP = 1,\n+\tMLX5_QPTS_TRUST_DSCP = 2,\n+};\n+\n enum mlx5_dcbx_oper_mode {\n \tMLX5E_DCBX_PARAM_VER_OPER_HOST = 0x0,\n \tMLX5E_DCBX_PARAM_VER_OPER_AUTO = 0x3,\ndiff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h\nindex f127c5b310c5..3e5363f760dd 100644\n--- a/include/linux/mlx5/mlx5_ifc.h\n+++ b/include/linux/mlx5/mlx5_ifc.h\n@@ -8578,6 +8578,26 @@ struct mlx5_ifc_qetc_reg_bits {\n \tstruct mlx5_ifc_ets_global_config_reg_bits global_configuration;\n };\n \n+struct mlx5_ifc_qpdpm_dscp_reg_bits {\n+\tu8 e[0x1];\n+\tu8 reserved_at_01[0x0b];\n+\tu8 prio[0x04];\n+};\n+\n+struct mlx5_ifc_qpdpm_reg_bits {\n+\tu8 reserved_at_0[0x8];\n+\tu8 local_port[0x8];\n+\tu8 reserved_at_10[0x10];\n+\tstruct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];\n+};\n+\n+struct mlx5_ifc_qpts_reg_bits {\n+\tu8 reserved_at_0[0x8];\n+\tu8 local_port[0x8];\n+\tu8 reserved_at_10[0x2d];\n+\tu8 trust_state[0x3];\n+};\n+\n struct mlx5_ifc_qtct_reg_bits {\n \tu8 reserved_at_0[0x8];\n \tu8 port_number[0x8];\ndiff --git a/include/linux/mlx5/port.h b/include/linux/mlx5/port.h\nindex c59af8ab753a..035f0d4dc9fe 100644\n--- a/include/linux/mlx5/port.h\n+++ b/include/linux/mlx5/port.h\n@@ -179,4 +179,9 @@ int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,\n \n int mlx5_query_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *out);\n int mlx5_set_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *in);\n+\n+int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state);\n+int mlx5_query_trust_state(struct mlx5_core_dev *mdev, u8 *trust_state);\n+int mlx5_set_dscp2prio(struct mlx5_core_dev *mdev, u8 dscp, u8 prio);\n+int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio);\n #endif /* __MLX5_PORT_H__ */\n","prefixes":["net-next","04/12"]}