{"id":833274,"url":"http://patchwork.ozlabs.org/api/1.2/patches/833274/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1509618375-164238-1-git-send-email-jiang.biao2@zte.com.cn/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1509618375-164238-1-git-send-email-jiang.biao2@zte.com.cn>","list_archive_url":null,"date":"2017-11-02T10:26:15","name":"tcg/mips: make some functions inline.","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a91b034f6f71aca68e8284d6829d77625a0202c3","submitter":{"id":47769,"url":"http://patchwork.ozlabs.org/api/1.2/people/47769/?format=json","name":"Jiang Biao","email":"jiang.biao2@zte.com.cn"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1509618375-164238-1-git-send-email-jiang.biao2@zte.com.cn/mbox/","series":[{"id":11468,"url":"http://patchwork.ozlabs.org/api/1.2/series/11468/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=11468","date":"2017-11-02T10:26:15","name":"tcg/mips: make some functions inline.","version":1,"mbox":"http://patchwork.ozlabs.org/series/11468/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/833274/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/833274/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3ySLt61KXkz9t30\n\tfor ;\n\tThu, 2 Nov 2017 21:29:08 +1100 (AEDT)","from localhost ([::1]:59537 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1eACkE-0006MZ-Ac\n\tfor incoming@patchwork.ozlabs.org; Thu, 02 Nov 2017 06:29:06 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:48865)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1eACju-0006MH-Ny\n\tfor qemu-devel@nongnu.org; Thu, 02 Nov 2017 06:28:47 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1eACjr-0000fh-L9\n\tfor qemu-devel@nongnu.org; Thu, 02 Nov 2017 06:28:46 -0400","from mxhk.zte.com.cn ([63.217.80.70]:37572)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1eACjr-0000YG-9m\n\tfor qemu-devel@nongnu.org; Thu, 02 Nov 2017 06:28:43 -0400","from mse01.zte.com.cn (unknown [10.30.3.20])\n\tby Forcepoint Email with ESMTPS id B7DFE170C3AAC50FBE60;\n\tThu, 2 Nov 2017 18:28:36 +0800 (CST)","from notes_smtp.zte.com.cn ([10.30.1.239])\n\tby mse01.zte.com.cn with ESMTP id vA2ASPhh000327;\n\tThu, 2 Nov 2017 18:28:25 +0800 (GMT-8)\n\t(envelope-from jiang.biao2@zte.com.cn)","from localhost.localdomain ([10.75.10.200])\n\tby szsmtp06.zte.com.cn (Lotus Domino Release 8.5.3FP6)\n\twith ESMTP id 2017110218283070-392484 ;\n\tThu, 2 Nov 2017 18:28:30 +0800 "],"From":"Jiang Biao ","To":"aurelien@aurel32.net, rth@twiddle.net","Date":"Thu, 2 Nov 2017 18:26:15 +0800","Message-Id":"<1509618375-164238-1-git-send-email-jiang.biao2@zte.com.cn>","X-Mailer":"git-send-email 1.8.3.1","X-MIMETrack":"Itemize by SMTP Server on SZSMTP06/server/zte_ltd(Release\n\t8.5.3FP6|November 21, 2013) at 2017-11-02 18:28:30,\n\tSerialize by Router on notes_smtp/zte_ltd(Release 9.0.1FP7|August 17,\n\t2016) at 2017-11-02 18:28:14,\n\tSerialize complete at 2017-11-02 18:28:14","X-MAIL":"mse01.zte.com.cn vA2ASPhh000327","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"63.217.80.70","Subject":"[Qemu-devel] [PATCH] tcg/mips: make some functions inline.","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"jiang.biao2@zte.com.cn, zhong.weidong@zte.com.cn, qemu-devel@nongnu.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Make some functions inline.\n\nSigned-off-by: Jiang Biao \n---\n tcg/mips/tcg-target.inc.c | 18 +++++++++---------\n 1 file changed, 9 insertions(+), 9 deletions(-)","diff":"diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c\nindex 4b55ab8..f83a8ec 100644\n--- a/tcg/mips/tcg-target.inc.c\n+++ b/tcg/mips/tcg-target.inc.c\n@@ -168,7 +168,7 @@ static inline void reloc_26(tcg_insn_unit *pc, tcg_insn_unit *target)\n *pc = deposit32(*pc, 0, 26, reloc_26_val(pc, target));\n }\n \n-static void patch_reloc(tcg_insn_unit *code_ptr, int type,\n+static inline void patch_reloc(tcg_insn_unit *code_ptr, int type,\n intptr_t value, intptr_t addend)\n {\n tcg_debug_assert(type == R_MIPS_PC16);\n@@ -507,7 +507,7 @@ static inline void tcg_out_opc_sa(TCGContext *s, MIPSInsn opc,\n \n }\n \n-static void tcg_out_opc_sa64(TCGContext *s, MIPSInsn opc1, MIPSInsn opc2,\n+static inline void tcg_out_opc_sa64(TCGContext *s, MIPSInsn opc1, MIPSInsn opc2,\n TCGReg rd, TCGReg rt, TCGArg sa)\n {\n int32_t inst;\n@@ -637,13 +637,13 @@ static inline void tcg_out_bswap16s(TCGContext *s, TCGReg ret, TCGReg arg)\n }\n }\n \n-static void tcg_out_bswap_subr(TCGContext *s, tcg_insn_unit *sub)\n+static inline void tcg_out_bswap_subr(TCGContext *s, tcg_insn_unit *sub)\n {\n bool ok = tcg_out_opc_jmp(s, OPC_JAL, sub);\n tcg_debug_assert(ok);\n }\n \n-static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)\n+static inline void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)\n {\n if (use_mips32r2_instructions) {\n tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);\n@@ -656,7 +656,7 @@ static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)\n }\n }\n \n-static void tcg_out_bswap32u(TCGContext *s, TCGReg ret, TCGReg arg)\n+static inline void tcg_out_bswap32u(TCGContext *s, TCGReg ret, TCGReg arg)\n {\n if (use_mips32r2_instructions) {\n tcg_out_opc_reg(s, OPC_DSBH, ret, 0, arg);\n@@ -670,7 +670,7 @@ static void tcg_out_bswap32u(TCGContext *s, TCGReg ret, TCGReg arg)\n }\n }\n \n-static void tcg_out_bswap64(TCGContext *s, TCGReg ret, TCGReg arg)\n+static inline void tcg_out_bswap64(TCGContext *s, TCGReg ret, TCGReg arg)\n {\n if (use_mips32r2_instructions) {\n tcg_out_opc_reg(s, OPC_DSBH, ret, 0, arg);\n@@ -1103,7 +1103,7 @@ static void tcg_out_call_int(TCGContext *s, tcg_insn_unit *arg, bool tail)\n }\n }\n \n-static void tcg_out_call(TCGContext *s, tcg_insn_unit *arg)\n+static inline void tcg_out_call(TCGContext *s, tcg_insn_unit *arg)\n {\n tcg_out_call_int(s, arg, false);\n tcg_out_nop(s);\n@@ -1661,7 +1661,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64)\n #endif\n }\n \n-static void tcg_out_mb(TCGContext *s, TCGArg a0)\n+static inline void tcg_out_mb(TCGContext *s, TCGArg a0)\n {\n static const MIPSInsn sync[] = {\n /* Note that SYNC_MB is a slightly weaker than SYNC 0,\n@@ -2433,7 +2433,7 @@ static void tcg_target_detect_isa(void)\n sigaction(SIGILL, &sa_old, NULL);\n }\n \n-static tcg_insn_unit *align_code_ptr(TCGContext *s)\n+static inline tcg_insn_unit *align_code_ptr(TCGContext *s)\n {\n uintptr_t p = (uintptr_t)s->code_ptr;\n if (p & 15) {\n","prefixes":[]}