{"id":832961,"url":"http://patchwork.ozlabs.org/api/1.2/patches/832961/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/1509547642-51110-5-git-send-email-lipeng321@huawei.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/1.2/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1509547642-51110-5-git-send-email-lipeng321@huawei.com>","list_archive_url":null,"date":"2017-11-01T14:47:17","name":"[net-next,4/9] net: hns3: Add support for misc interrupt","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":true,"hash":"b188d822db9cc9ded9f460176cf219fd6f3d9a3a","submitter":{"id":71468,"url":"http://patchwork.ozlabs.org/api/1.2/people/71468/?format=json","name":"lipeng (Y)","email":"lipeng321@huawei.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/1.2/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/1509547642-51110-5-git-send-email-lipeng321@huawei.com/mbox/","series":[{"id":11334,"url":"http://patchwork.ozlabs.org/api/1.2/series/11334/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=11334","date":"2017-11-01T14:47:14","name":"net: hns3: add support for reset","version":1,"mbox":"http://patchwork.ozlabs.org/series/11334/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/832961/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/832961/checks/","tags":{},"related":[],"headers":{"Return-Path":"<netdev-owner@vger.kernel.org>","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yRr6c5Tv4z9sPs\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu,  2 Nov 2017 01:23:20 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S933163AbdKAOWw (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tWed, 1 Nov 2017 10:22:52 -0400","from szxga06-in.huawei.com ([45.249.212.32]:38429 \"EHLO huawei.com\"\n\trhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP\n\tid S1754686AbdKAOVM (ORCPT <rfc822;netdev@vger.kernel.org>);\n\tWed, 1 Nov 2017 10:21:12 -0400","from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.59])\n\tby Forcepoint Email with ESMTP id ED389120FFD10;\n\tWed,  1 Nov 2017 22:20:58 +0800 (CST)","from linux-ioko.site (10.71.200.31) by\n\tDGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP\n\tServer id 14.3.361.1; Wed, 1 Nov 2017 22:19:50 +0800"],"From":"Lipeng <lipeng321@huawei.com>","To":"<davem@davemloft.net>","CC":"<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,\n\t<linuxarm@huawei.com>, <yisen.zhuang@huawei.com>,\n\t<salil.mehta@huawei.com>, <lipeng321@huawei.com>","Subject":"[PATCH net-next 4/9] net: hns3: Add support for misc interrupt","Date":"Wed, 1 Nov 2017 22:47:17 +0800","Message-ID":"<1509547642-51110-5-git-send-email-lipeng321@huawei.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1509547642-51110-1-git-send-email-lipeng321@huawei.com>","References":"<1509547642-51110-1-git-send-email-lipeng321@huawei.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-Originating-IP":"[10.71.200.31]","X-CFilter-Loop":"Reflected","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<netdev.vger.kernel.org>","X-Mailing-List":"netdev@vger.kernel.org"},"content":"From: qumingguang <qumingguang@huawei.com>\n\nThis patch adds initialization and deinitialization for misc interrupt.\nThis interrupt will be used to handle reset message(IRQ).\n\nSigned-off-by: qumingguang <qumingguang@huawei.com>\nSigned-off-by: Lipeng <lipeng321@huawei.com>\n---\n .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h |  5 ++\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c    | 74 ++++++++++++++++++++++\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h    |  2 +\n 3 files changed, 81 insertions(+)","diff":"diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h\nindex 6bdc216..db4d887 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h\n@@ -63,6 +63,11 @@ enum hclge_cmd_status {\n \tHCLGE_ERR_CSQ_ERROR\t= -3,\n };\n \n+struct hclge_misc_vector {\n+\tu8 __iomem *addr;\n+\tint vector_irq;\n+};\n+\n struct hclge_cmq {\n \tstruct hclge_cmq_ring csq;\n \tstruct hclge_cmq_ring crq;\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\nindex a7686fe..7558cfb 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n@@ -2392,11 +2392,71 @@ static void hclge_service_complete(struct hclge_dev *hdev)\n \tclear_bit(HCLGE_STATE_SERVICE_SCHED, &hdev->state);\n }\n \n+static irqreturn_t hclge_misc_irq_handle(int irq, void *data)\n+{\n+\tstruct hclge_dev *hdev = data;\n+\n+\thclge_enable_vector(&hdev->misc_vector, false);\n+\tif (!test_and_set_bit(HCLGE_STATE_SERVICE_SCHED, &hdev->state))\n+\t\tschedule_work(&hdev->service_task);\n+\n+\treturn IRQ_HANDLED;\n+}\n+\n+static void hclge_free_vector(struct hclge_dev *hdev, int vector_id)\n+{\n+\thdev->vector_status[vector_id] = HCLGE_INVALID_VPORT;\n+\thdev->num_msi_left += 1;\n+\thdev->num_msi_used -= 1;\n+}\n+\n+static void hclge_get_misc_vector(struct hclge_dev *hdev)\n+{\n+\tstruct hclge_misc_vector *vector = &hdev->misc_vector;\n+\n+\tvector->vector_irq = pci_irq_vector(hdev->pdev, 0);\n+\n+\tvector->addr = hdev->hw.io_base + HCLGE_MISC_VECTOR_REG_BASE;\n+\thdev->vector_status[0] = 0;\n+\n+\thdev->num_msi_left -= 1;\n+\thdev->num_msi_used += 1;\n+}\n+\n+static int hclge_misc_irq_init(struct hclge_dev *hdev)\n+{\n+\tint ret;\n+\n+\thclge_get_misc_vector(hdev);\n+\n+\tret = devm_request_irq(&hdev->pdev->dev,\n+\t\t\t       hdev->misc_vector.vector_irq,\n+\t\t\t       hclge_misc_irq_handle, 0, \"hclge_misc\", hdev);\n+\tif (ret) {\n+\t\thclge_free_vector(hdev, 0);\n+\t\tdev_err(&hdev->pdev->dev, \"request misc irq(%d) fail\\n\",\n+\t\t\thdev->misc_vector.vector_irq);\n+\t}\n+\n+\treturn ret;\n+}\n+\n+void hclge_enable_vector(struct hclge_misc_vector *vector, bool enable)\n+{\n+\twritel(enable, vector->addr);\n+}\n+\n+static void hclge_misc_irq_service_task(struct hclge_dev *hdev)\n+{\n+\thclge_enable_vector(&hdev->misc_vector, true);\n+}\n+\n static void hclge_service_task(struct work_struct *work)\n {\n \tstruct hclge_dev *hdev =\n \t\tcontainer_of(work, struct hclge_dev, service_task);\n \n+\thclge_misc_irq_service_task(hdev);\n \thclge_update_speed_duplex(hdev);\n \thclge_update_link_status(hdev);\n \thclge_update_stats_for_all(hdev);\n@@ -4480,6 +4540,14 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)\n \t\treturn ret;\n \t}\n \n+\tret = hclge_misc_irq_init(hdev);\n+\tif (ret) {\n+\t\tdev_err(&pdev->dev,\n+\t\t\t\"Misc IRQ(vector0) init error, ret = %d.\\n\",\n+\t\t\tret);\n+\t\treturn ret;\n+\t}\n+\n \tret = hclge_alloc_tqps(hdev);\n \tif (ret) {\n \t\tdev_err(&pdev->dev, \"Allocate TQPs error, ret = %d.\\n\", ret);\n@@ -4545,6 +4613,9 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)\n \ttimer_setup(&hdev->service_timer, hclge_service_timer, 0);\n \tINIT_WORK(&hdev->service_task, hclge_service_task);\n \n+\t/* Enable MISC vector(vector0) */\n+\thclge_enable_vector(&hdev->misc_vector, true);\n+\n \tset_bit(HCLGE_STATE_SERVICE_INITED, &hdev->state);\n \tset_bit(HCLGE_STATE_DOWN, &hdev->state);\n \n@@ -4577,6 +4648,9 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)\n \tif (mac->phydev)\n \t\tmdiobus_unregister(mac->mdio_bus);\n \n+\t/* Disable MISC vector(vector0) */\n+\thclge_enable_vector(&hdev->misc_vector, false);\n+\thclge_free_vector(hdev, 0);\n \thclge_destroy_cmd_queue(&hdev->hw);\n \thclge_pci_uninit(hdev);\n \tae_dev->priv = NULL;\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\nindex bca4430..2a1d4d6 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\n@@ -27,6 +27,7 @@\n \t(HCLGE_PF_CFG_BLOCK_SIZE / HCLGE_CFG_RD_LEN_BYTES)\n \n #define HCLGE_VECTOR_REG_BASE\t\t0x20000\n+#define HCLGE_MISC_VECTOR_REG_BASE\t0x20400\n \n #define HCLGE_VECTOR_REG_OFFSET\t\t0x4\n #define HCLGE_VECTOR_VF_OFFSET\t\t0x100000\n@@ -400,6 +401,7 @@ struct hclge_dev {\n \tstruct pci_dev *pdev;\n \tstruct hnae3_ae_dev *ae_dev;\n \tstruct hclge_hw hw;\n+\tstruct hclge_misc_vector misc_vector;\n \tstruct hclge_hw_stats hw_stats;\n \tunsigned long state;\n \n","prefixes":["net-next","4/9"]}