{"id":831225,"url":"http://patchwork.ozlabs.org/api/1.2/patches/831225/?format=json","web_url":"http://patchwork.ozlabs.org/project/glibc/patch/1509101470-7881-21-git-send-email-Dave.Martin@arm.com/","project":{"id":41,"url":"http://patchwork.ozlabs.org/api/1.2/projects/41/?format=json","name":"GNU C Library","link_name":"glibc","list_id":"libc-alpha.sourceware.org","list_email":"libc-alpha@sourceware.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1509101470-7881-21-git-send-email-Dave.Martin@arm.com>","list_archive_url":null,"date":"2017-10-27T10:51:02","name":"[v4,20/28] arm64/sve: Add prctl controls for userspace vector length management","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"c32570c2ab025706a8023b68e8ea87621ca09f0d","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/1.2/people/26612/?format=json","name":"Dave Martin","email":"Dave.Martin@arm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/glibc/patch/1509101470-7881-21-git-send-email-Dave.Martin@arm.com/mbox/","series":[{"id":10555,"url":"http://patchwork.ozlabs.org/api/1.2/series/10555/?format=json","web_url":"http://patchwork.ozlabs.org/project/glibc/list/?series=10555","date":"2017-10-27T10:50:42","name":"ARM Scalable Vector Extension (SVE)","version":4,"mbox":"http://patchwork.ozlabs.org/series/10555/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/831225/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/831225/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-86461-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"Hlsb2hCo\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yNgkl53vfz9rxj\n\tfor ;\n\tFri, 27 Oct 2017 21:55:11 +1100 (AEDT)","(qmail 120012 invoked by alias); 27 Oct 2017 10:52:01 -0000","(qmail 119952 invoked by uid 89); 27 Oct 2017 10:52:00 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-type:content-transfer-encoding;\n\tq=dns; s=default; b=ZXk9j8cjf6KpQSjkexda6BZtOzXYiUJA42wB9aNtUBp\n\t/4UFsWHZvdsW09hx69FNTH2sfpBdv7FgjsCRDHVk16O+k7dNohNZud36mrL/ZiBY\n\tWvIh+6Wmr/CMlqKcTTyGh1grFEaMG38dFcpU385OykMBcwl2L1RDd9MP1kToxX08\n\t=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-type:content-transfer-encoding;\n\ts=default; bh=oRE2/0gVN3yejg660OI+M7ISQ64=; b=Hlsb2hCows5GrVJUM\n\tJ89iHjWow3IUJAWyCQgcCCDoUQWjaAVAq8GRydXsP1lOmYJIjh/gmDCk+FypH4dc\n\tiEwTZknNWK+fO61zNGJMVQbyuBxUNTCs4pBE6hDu+8NHtrFQ67n1Z6sUycen225b\n\tNs3YZGd31WG6WcxiqRAW/8UZ3o=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0,\n\tGIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=","X-HELO":"foss.arm.com","From":"Dave Martin ","To":"linux-arm-kernel@lists.infradead.org","Cc":"Catalin Marinas , Will Deacon\n\t, \tArd Biesheuvel ,\n\t=?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= ,\n\tSzabolcs Nagy , Okamoto Takayuki\n\t, \tkvmarm@lists.cs.columbia.edu,\n\tlibc-alpha@sourceware.org, \tlinux-arch@vger.kernel.org","Subject":"[PATCH v4 20/28] arm64/sve: Add prctl controls for userspace vector\n\tlength management","Date":"Fri, 27 Oct 2017 11:51:02 +0100","Message-Id":"<1509101470-7881-21-git-send-email-Dave.Martin@arm.com>","In-Reply-To":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>","References":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit"},"content":"This patch adds two arm64-specific prctls, to permit userspace to\ncontrol its vector length:\n\n * PR_SVE_SET_VL: set the thread's SVE vector length and vector\n length inheritance mode.\n\n * PR_SVE_GET_VL: get the same information.\n\nAlthough these prctls resemble instruction set features in the SVE\narchitecture, they provide additional control: the vector length\ninheritance mode is Linux-specific and nothing to do with the\narchitecture, and the architecture does not permit EL0 to set its\nown vector length directly. Both can be used in portable tools\nwithout requiring the use of SVE instructions.\n\nSigned-off-by: Dave Martin \nReviewed-by: Catalin Marinas \nCc: Alex Bennée \n\n---\n\n**Dropped at v3** Reviewed-by: Alex Bennée \ndue to non-trivial changes/fixes after v2.\n\nChanges since v3\n----------------\n\nRequested by Catalin Marinas:\n\n * Replace static __maybe_unused functions with static inlines.\n\n (Retaining Catalin's Reviewed-by with his approval.)\n---\n arch/arm64/include/asm/fpsimd.h | 14 +++++++++++\n arch/arm64/include/asm/processor.h | 4 +++\n arch/arm64/kernel/fpsimd.c | 50 ++++++++++++++++++++++++++++++++++++++\n include/uapi/linux/prctl.h | 4 +++\n kernel/sys.c | 12 +++++++++\n 5 files changed, 84 insertions(+)","diff":"diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h\nindex d754e5a..b868412 100644\n--- a/arch/arm64/include/asm/fpsimd.h\n+++ b/arch/arm64/include/asm/fpsimd.h\n@@ -17,6 +17,7 @@\n #define __ASM_FP_H\n \n #include \n+#include \n \n #ifndef __ASSEMBLY__\n \n@@ -98,6 +99,9 @@ extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);\n extern int sve_set_vector_length(struct task_struct *task,\n \t\t\t\t unsigned long vl, unsigned long flags);\n \n+extern int sve_set_current_vl(unsigned long arg);\n+extern int sve_get_current_vl(void);\n+\n /*\n * Probing and setup functions.\n * Calls to these functions must be serialised with one another.\n@@ -114,6 +118,16 @@ static inline void fpsimd_release_task(struct task_struct *task) { }\n static inline void sve_sync_to_fpsimd(struct task_struct *task) { }\n static inline void sve_sync_from_fpsimd_zeropad(struct task_struct *task) { }\n \n+static inline int sve_set_current_vl(unsigned long arg)\n+{\n+\treturn -EINVAL;\n+}\n+\n+static inline int sve_get_current_vl(void)\n+{\n+\treturn -EINVAL;\n+}\n+\n static inline void sve_init_vq_map(void) { }\n static inline void sve_update_vq_map(void) { }\n static inline int sve_verify_vq_map(void) { return 0; }\ndiff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h\nindex c6fddb0..023cacb 100644\n--- a/arch/arm64/include/asm/processor.h\n+++ b/arch/arm64/include/asm/processor.h\n@@ -217,5 +217,9 @@ static inline void spin_lock_prefetch(const void *ptr)\n int cpu_enable_pan(void *__unused);\n int cpu_enable_cache_maint_trap(void *__unused);\n \n+/* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */\n+#define SVE_SET_VL(arg)\tsve_set_current_vl(arg)\n+#define SVE_GET_VL()\tsve_get_current_vl()\n+\n #endif /* __ASSEMBLY__ */\n #endif /* __ASM_PROCESSOR_H */\ndiff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c\nindex a47ce44..7465622 100644\n--- a/arch/arm64/kernel/fpsimd.c\n+++ b/arch/arm64/kernel/fpsimd.c\n@@ -28,6 +28,7 @@\n #include \n #include \n #include \n+#include \n #include \n #include \n #include \n@@ -557,6 +558,55 @@ int sve_set_vector_length(struct task_struct *task,\n }\n \n /*\n+ * Encode the current vector length and flags for return.\n+ * This is only required for prctl(): ptrace has separate fields\n+ *\n+ * flags are as for sve_set_vector_length().\n+ */\n+static int sve_prctl_status(unsigned long flags)\n+{\n+\tint ret;\n+\n+\tif (flags & PR_SVE_SET_VL_ONEXEC)\n+\t\tret = current->thread.sve_vl_onexec;\n+\telse\n+\t\tret = current->thread.sve_vl;\n+\n+\tif (test_thread_flag(TIF_SVE_VL_INHERIT))\n+\t\tret |= PR_SVE_VL_INHERIT;\n+\n+\treturn ret;\n+}\n+\n+/* PR_SVE_SET_VL */\n+int sve_set_current_vl(unsigned long arg)\n+{\n+\tunsigned long vl, flags;\n+\tint ret;\n+\n+\tvl = arg & PR_SVE_VL_LEN_MASK;\n+\tflags = arg & ~vl;\n+\n+\tif (!system_supports_sve())\n+\t\treturn -EINVAL;\n+\n+\tret = sve_set_vector_length(current, vl, flags);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\treturn sve_prctl_status(flags);\n+}\n+\n+/* PR_SVE_GET_VL */\n+int sve_get_current_vl(void)\n+{\n+\tif (!system_supports_sve())\n+\t\treturn -EINVAL;\n+\n+\treturn sve_prctl_status(0);\n+}\n+\n+/*\n * Bitmap for temporary storage of the per-CPU set of supported vector lengths\n * during secondary boot.\n */\ndiff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h\nindex 1b64901..1ef9370 100644\n--- a/include/uapi/linux/prctl.h\n+++ b/include/uapi/linux/prctl.h\n@@ -198,7 +198,11 @@ struct prctl_mm_map {\n # define PR_CAP_AMBIENT_CLEAR_ALL\t4\n \n /* arm64 Scalable Vector Extension controls */\n+/* Flag values must be kept in sync with ptrace NT_ARM_SVE interface */\n+#define PR_SVE_SET_VL\t\t\t48\t/* set task vector length */\n # define PR_SVE_SET_VL_ONEXEC\t\t(1 << 18) /* defer effect until exec */\n+#define PR_SVE_GET_VL\t\t\t49\t/* get task vector length */\n+/* Bits common to PR_SVE_SET_VL and PR_SVE_GET_VL */\n # define PR_SVE_VL_LEN_MASK\t\t0xffff\n # define PR_SVE_VL_INHERIT\t\t(1 << 17) /* inherit across exec */\n \ndiff --git a/kernel/sys.c b/kernel/sys.c\nindex 9aebc29..c541916 100644\n--- a/kernel/sys.c\n+++ b/kernel/sys.c\n@@ -110,6 +110,12 @@\n #ifndef SET_FP_MODE\n # define SET_FP_MODE(a,b)\t(-EINVAL)\n #endif\n+#ifndef SVE_SET_VL\n+# define SVE_SET_VL(a)\t\t(-EINVAL)\n+#endif\n+#ifndef SVE_GET_VL\n+# define SVE_GET_VL()\t\t(-EINVAL)\n+#endif\n \n /*\n * this is where the system-wide overflow UID and GID are defined, for\n@@ -2385,6 +2391,12 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,\n \tcase PR_GET_FP_MODE:\n \t\terror = GET_FP_MODE(me);\n \t\tbreak;\n+\tcase PR_SVE_SET_VL:\n+\t\terror = SVE_SET_VL(arg2);\n+\t\tbreak;\n+\tcase PR_SVE_GET_VL:\n+\t\terror = SVE_GET_VL();\n+\t\tbreak;\n \tdefault:\n \t\terror = -EINVAL;\n \t\tbreak;\n","prefixes":["v4","20/28"]}