{"id":831221,"url":"http://patchwork.ozlabs.org/api/1.2/patches/831221/?format=json","web_url":"http://patchwork.ozlabs.org/project/glibc/patch/1509101470-7881-18-git-send-email-Dave.Martin@arm.com/","project":{"id":41,"url":"http://patchwork.ozlabs.org/api/1.2/projects/41/?format=json","name":"GNU C Library","link_name":"glibc","list_id":"libc-alpha.sourceware.org","list_email":"libc-alpha@sourceware.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1509101470-7881-18-git-send-email-Dave.Martin@arm.com>","list_archive_url":null,"date":"2017-10-27T10:50:59","name":"[v4,17/28] arm64/sve: Preserve SVE registers around kernel-mode NEON use","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a88782c7224aeb120596794fe0657bc3491dae27","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/1.2/people/26612/?format=json","name":"Dave Martin","email":"Dave.Martin@arm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/glibc/patch/1509101470-7881-18-git-send-email-Dave.Martin@arm.com/mbox/","series":[{"id":10555,"url":"http://patchwork.ozlabs.org/api/1.2/series/10555/?format=json","web_url":"http://patchwork.ozlabs.org/project/glibc/list/?series=10555","date":"2017-10-27T10:50:42","name":"ARM Scalable Vector Extension (SVE)","version":4,"mbox":"http://patchwork.ozlabs.org/series/10555/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/831221/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/831221/checks/","tags":{},"related":[],"headers":{"Return-Path":"<libc-alpha-return-86458-incoming=patchwork.ozlabs.org@sourceware.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-86458-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"D9ofRBZz\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yNgk45gJPz9rxj\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 27 Oct 2017 21:54:36 +1100 (AEDT)","(qmail 119305 invoked by alias); 27 Oct 2017 10:51:55 -0000","(qmail 119205 invoked by uid 89); 27 Oct 2017 10:51:54 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-type:content-transfer-encoding;\n\tq=dns; s=default; b=UOPOQ3RAzD+2ulF+YpcCc1/0RAh/nxGVPP3qj2vKCVA\n\tEAcMLw+2FqkLmQcUA9IRugqPZZymIOOT/bQY9iWyrSV8Nww+ZTn6bB6B1jH1UPeS\n\tFnDNOe9WD4UDb46C4lkqUfGUprBXedZS+Rgj2Pt83bWkBEk5n6IEiidydEiv336w\n\t=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-type:content-transfer-encoding;\n\ts=default; bh=RtBBMlskQKWN3iN3uyxXIy/WKfU=; b=D9ofRBZzHy3lJVRtW\n\t+zhvGEa3VTmsnx6HXKrT+uXhRxdDG0klI+1ogQhW4xAx/ldcvkpGCXxQiehCPhpY\n\t3Gq5K+6KCpaEJ/0rlEgAmbN5h1pX0sfcbspPpSk0w+g2KuNmKu+hpCY0d6OZsh3A\n\tBgX4GJt9DYT3pM3PoqSP92xHqc=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"<libc-alpha.sourceware.org>","List-Unsubscribe":"<mailto:libc-alpha-unsubscribe-incoming=patchwork.ozlabs.org@sourceware.org>","List-Subscribe":"<mailto:libc-alpha-subscribe@sourceware.org>","List-Archive":"<http://sourceware.org/ml/libc-alpha/>","List-Post":"<mailto:libc-alpha@sourceware.org>","List-Help":"<mailto:libc-alpha-help@sourceware.org>,\n\t<http://sourceware.org/ml/#faqs>","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0,\n\tGIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=","X-HELO":"foss.arm.com","From":"Dave Martin <Dave.Martin@arm.com>","To":"linux-arm-kernel@lists.infradead.org","Cc":"Catalin Marinas <catalin.marinas@arm.com>, Will Deacon\n\t<will.deacon@arm.com>, \tArd Biesheuvel <ard.biesheuvel@linaro.org>,\n\t=?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= <alex.bennee@linaro.org>,\n\tSzabolcs Nagy <szabolcs.nagy@arm.com>, Okamoto Takayuki\n\t<tokamoto@jp.fujitsu.com>, \tkvmarm@lists.cs.columbia.edu,\n\tlibc-alpha@sourceware.org, \tlinux-arch@vger.kernel.org","Subject":"[PATCH v4 17/28] arm64/sve: Preserve SVE registers around\n\tkernel-mode NEON use","Date":"Fri, 27 Oct 2017 11:50:59 +0100","Message-Id":"<1509101470-7881-18-git-send-email-Dave.Martin@arm.com>","In-Reply-To":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>","References":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit"},"content":"Kernel-mode NEON will corrupt the SVE vector registers, due to the\nway they alias the FPSIMD vector registers in the hardware.\n\nThis patch ensures that any live SVE register content for the task\nis saved by kernel_neon_begin().  The data will be restored in the\nusual way on return to userspace.\n\nSigned-off-by: Dave Martin <Dave.Martin@arm.com>\nReviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nReviewed-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Catalin Marinas <catalin.marinas@arm.com>\n---\n arch/arm64/kernel/fpsimd.c | 6 ++++--\n 1 file changed, 4 insertions(+), 2 deletions(-)","diff":"diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c\nindex 703e9d7..d5108e8 100644\n--- a/arch/arm64/kernel/fpsimd.c\n+++ b/arch/arm64/kernel/fpsimd.c\n@@ -884,8 +884,10 @@ void kernel_neon_begin(void)\n \t__this_cpu_write(kernel_neon_busy, true);\n \n \t/* Save unsaved task fpsimd state, if any: */\n-\tif (current->mm && !test_and_set_thread_flag(TIF_FOREIGN_FPSTATE))\n-\t\tfpsimd_save_state(&current->thread.fpsimd_state);\n+\tif (current->mm) {\n+\t\ttask_fpsimd_save();\n+\t\tset_thread_flag(TIF_FOREIGN_FPSTATE);\n+\t}\n \n \t/* Invalidate any task state remaining in the fpsimd regs: */\n \t__this_cpu_write(fpsimd_last_state, NULL);\n","prefixes":["v4","17/28"]}