{"id":829992,"url":"http://patchwork.ozlabs.org/api/1.2/patches/829992/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/20171024175714.15840-6-clabbe.montjoie@gmail.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/1.2/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20171024175714.15840-6-clabbe.montjoie@gmail.com>","list_archive_url":null,"date":"2017-10-24T17:57:09","name":"[v9,05/10] arm: dts: sunxi: Restore EMAC changes (boards)","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"b90eb857f6d5d08d5ee4293d77a651a94246054e","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/1.2/people/64152/?format=json","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/1.2/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20171024175714.15840-6-clabbe.montjoie@gmail.com/mbox/","series":[{"id":10031,"url":"http://patchwork.ozlabs.org/api/1.2/series/10031/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=10031","date":"2017-10-24T17:57:06","name":"net: stmmac: dwmac-sun8i: Handle integrated PHY","version":9,"mbox":"http://patchwork.ozlabs.org/series/10031/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/829992/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/829992/checks/","tags":{},"related":[],"headers":{"Return-Path":"<netdev-owner@vger.kernel.org>","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"SySpO5pQ\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yM1NN6wDKz9sBd\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 25 Oct 2017 05:03:32 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752047AbdJXSDT (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tTue, 24 Oct 2017 14:03:19 -0400","from mail-wr0-f196.google.com ([209.85.128.196]:43688 \"EHLO\n\tmail-wr0-f196.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751782AbdJXSAv (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Tue, 24 Oct 2017 14:00:51 -0400","by mail-wr0-f196.google.com with SMTP id w105so12236836wrc.0;\n\tTue, 24 Oct 2017 11:00:50 -0700 (PDT)","from Red.local (LFbn-MAR-1-580-96.w90-118.abo.wanadoo.fr.\n\t[90.118.159.96]) by smtp.googlemail.com with ESMTPSA id\n\ts18sm818968wrg.87.2017.10.24.11.00.48\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tTue, 24 Oct 2017 11:00:48 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=9IB/uMwtdnfnx9QK4kyt7l9p9uWyVB82vrumDZUIISw=;\n\tb=SySpO5pQu6YNURaXwl7wChQQvrhqBTsbWkeWvQq8snTHXthPGamk6/FpfxpRk+RU+4\n\tu52EpNd1Ta74fKij+52zdQ7k5hC1fRktRQT6nl/2hMJvleydLTU1SJ5nzGDSzXm34X/H\n\tVyZFCZ12vkD50N4IyI3oFvVbqs4AhAUnnJAtUzkL8dGlA+2u6nganCZb6K5Hopv6KcXq\n\tyrw9NmPu57VM20xrVJMTR4nTrIOI5K/muoDzS49lUUhAucS/+UO/X8H/s0QqZu83IHME\n\tZ8+jeu0W3jYGpZ/+zrao9mI+zYLZxFMJhISKLD0XmWxeYJ4R6nK+3pdXbXIcvQlVSzWC\n\tiaJQ==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=9IB/uMwtdnfnx9QK4kyt7l9p9uWyVB82vrumDZUIISw=;\n\tb=H7Pd0hZZSmQ+sEMPQQPN9NeCq9AFiZvzccayDoBy2CHYYeLwnAp4zhv0cmBFfK8BrB\n\tGlm1FhjcXAwel1Og3s7VKOmJPlrI8S9Ncez5J4Gn0u78JDGkSzy7mErS7GbfwhMc6JCw\n\tNFnmzczURyMWeo/EqLoP3Vvfa/1BVk1ovvjXdCdFBL235Iv3Rn/6xdYac91te9pkWxpD\n\t44nqFu6BirWisR5wlO+PI6kDXlQ9kzRRbWqC7aQo5GvmyxOJNZY5FpdJBqais4/W8+4f\n\tGGgan0sZoAUZoA64hbTy85OIuQELtl14CSpEzekjmitEn317IE9fY7XVejzuzJoREMm2\n\tssiA==","X-Gm-Message-State":"AMCzsaXOs/tF2BaYLxhe+JKUiaJqWpBH1J+fnmtdbPMVRukJ8GzlpuwM\n\tZJDs2NU4YzbmaB+kXxgWr+A=","X-Google-Smtp-Source":"ABhQp+Q7gLdGhw4pioFADSneDTawzEu9QOt4ODRu/N+OPlIezDXVzfZK1omAz6+AgBo7M8drkcdeZg==","X-Received":"by 10.223.133.174 with SMTP id 43mr12792247wrt.17.1508868049312; \n\tTue, 24 Oct 2017 11:00:49 -0700 (PDT)","From":"Corentin Labbe <clabbe.montjoie@gmail.com>","To":"robh+dt@kernel.org, mark.rutland@arm.com,\n\tmaxime.ripard@free-electrons.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com","Cc":"netdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tCorentin Labbe <clabbe.montjoie@gmail.com>","Subject":"[PATCH v9 05/10] arm: dts: sunxi: Restore EMAC changes (boards)","Date":"Tue, 24 Oct 2017 19:57:09 +0200","Message-Id":"<20171024175714.15840-6-clabbe.montjoie@gmail.com>","X-Mailer":"git-send-email 2.13.6","In-Reply-To":"<20171024175714.15840-1-clabbe.montjoie@gmail.com>","References":"<20171024175714.15840-1-clabbe.montjoie@gmail.com>","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<netdev.vger.kernel.org>","X-Mailing-List":"netdev@vger.kernel.org"},"content":"The original dwmac-sun8i DT bindings have some issue on how to handle\nintegrated PHY and was reverted in last RC of 4.13.\nBut now we have a solution so we need to get back that was reverted.\n\nThis patch restore all boards DT about dwmac-sun8i\nThis reverts partially commit fe45174b72ae (\"arm: dts: sunxi: Revert EMAC changes\")\n\nSigned-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>\n---\n arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 +++++++++\n arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +++++++++++++++++++\n arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts     | 19 +++++++++++++++++++\n arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts         |  7 +++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-2.dts         |  8 ++++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-one.dts       |  8 ++++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +++++\n arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts        |  8 ++++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts      | 22 ++++++++++++++++++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts    | 16 ++++++++++++++++\n 10 files changed, 121 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts\nindex b1502df7b509..6713d0f2b3f4 100644\n--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts\n+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts\n@@ -56,6 +56,8 @@\n \n \taliases {\n \t\tserial0 = &uart0;\n+\t\t/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */\n+\t\tethernet0 = &emac;\n \t\tethernet1 = &xr819;\n \t};\n \n@@ -102,6 +104,13 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n &mmc0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&mmc0_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts\nindex e1dba9ffa94b..f2292deaa590 100644\n--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts\n@@ -52,6 +52,7 @@\n \tcompatible = \"sinovoip,bpi-m2-plus\", \"allwinner,sun8i-h3\";\n \n \taliases {\n+\t\tethernet0 = &emac;\n \t\tserial0 = &uart0;\n \t\tserial1 = &uart1;\n \t};\n@@ -111,6 +112,24 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&emac_rgmii_pins>;\n+\tphy-supply = <&reg_gmac_3v3>;\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n+&external_mdio {\n+\text_rgmii_phy: ethernet-phy@1 {\n+\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n+\t\treg = <0>;\n+\t};\n+};\n+\n &ir {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&ir_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\nindex 73766d38ee6c..cfb96da3cfef 100644\n--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n@@ -66,6 +66,25 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&emac_rgmii_pins>;\n+\tphy-supply = <&reg_gmac_3v3>;\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\n+\tallwinner,leds-active-low;\n+\n+\tstatus = \"okay\";\n+};\n+\n+&external_mdio {\n+\text_rgmii_phy: ethernet-phy@1 {\n+\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n+\t\treg = <7>;\n+\t};\n+};\n+\n &ir {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&ir_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts\nindex 8d2cc6e9a03f..78f6c24952dd 100644\n--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts\n@@ -46,3 +46,10 @@\n \tmodel = \"FriendlyARM NanoPi NEO\";\n \tcompatible = \"friendlyarm,nanopi-neo\", \"allwinner,sun8i-h3\";\n };\n+\n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts\nindex 1bf51802f5aa..b20be95b49d5 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts\n@@ -54,6 +54,7 @@\n \taliases {\n \t\tserial0 = &uart0;\n \t\t/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */\n+\t\tethernet0 = &emac;\n \t\tethernet1 = &rtl8189;\n \t};\n \n@@ -117,6 +118,13 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n &ir {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&ir_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts\nindex a1c6ff6fd05d..82e5d28cd698 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts\n@@ -52,6 +52,7 @@\n \tcompatible = \"xunlong,orangepi-one\", \"allwinner,sun8i-h3\";\n \n \taliases {\n+\t\tethernet0 = &emac;\n \t\tserial0 = &uart0;\n \t};\n \n@@ -97,6 +98,13 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n &mmc0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts\nindex 8b93f5c781a7..a10281b455f5 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts\n@@ -53,6 +53,11 @@\n \t};\n };\n \n+&emac {\n+\t/* LEDs changed to active high on the plus */\n+\t/delete-property/ allwinner,leds-active-low;\n+};\n+\n &mmc1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&mmc1_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts\nindex d0b80fda2f6b..6d98bcfbe877 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts\n@@ -52,6 +52,7 @@\n \tcompatible = \"xunlong,orangepi-pc\", \"allwinner,sun8i-h3\";\n \n \taliases {\n+\t\tethernet0 = &emac;\n \t\tserial0 = &uart0;\n \t};\n \n@@ -117,6 +118,13 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n &ir {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&ir_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts\nindex 72ca01b93f1b..cbc499b04de4 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts\n@@ -47,6 +47,10 @@\n \tmodel = \"Xunlong Orange Pi Plus / Plus 2\";\n \tcompatible = \"xunlong,orangepi-plus\", \"allwinner,sun8i-h3\";\n \n+\taliases {\n+\t\tethernet0 = &emac;\n+\t};\n+\n \treg_gmac_3v3: gmac-3v3 {\n \t\tcompatible = \"regulator-fixed\";\n \t\tregulator-name = \"gmac-3v3\";\n@@ -74,6 +78,24 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&emac_rgmii_pins>;\n+\tphy-supply = <&reg_gmac_3v3>;\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n+&external_mdio {\n+\text_rgmii_phy: ethernet-phy@1 {\n+\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n+\t\treg = <0>;\n+\t};\n+};\n+\n &mmc2 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&mmc2_8bit_pins>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts\nindex 97920b12a944..6dbf7b2e0c13 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts\n@@ -61,3 +61,19 @@\n \t\tgpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */\n \t};\n };\n+\n+&emac {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&emac_rgmii_pins>;\n+\tphy-supply = <&reg_gmac_3v3>;\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\tstatus = \"okay\";\n+};\n+\n+&external_mdio {\n+\text_rgmii_phy: ethernet-phy@1 {\n+\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n+\t\treg = <1>;\n+\t};\n+};\n","prefixes":["v9","05/10"]}