{"id":813377,"url":"http://patchwork.ozlabs.org/api/1.2/patches/813377/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/150530175686.10902.13435538263886289800.stgit@frigg.lan/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<150530175686.10902.13435538263886289800.stgit@frigg.lan>","list_archive_url":null,"date":"2017-09-13T11:22:37","name":"[v6,22/22] instrument: Add API to manipulate guest memory","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d7827e7ecdac6012c276bf5fcfe8d5f59a6a3a5a","submitter":{"id":9099,"url":"http://patchwork.ozlabs.org/api/1.2/people/9099/?format=json","name":"Lluís Vilanova","email":"vilanova@ac.upc.edu"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/150530175686.10902.13435538263886289800.stgit@frigg.lan/mbox/","series":[{"id":2857,"url":"http://patchwork.ozlabs.org/api/1.2/series/2857/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2857","date":"2017-09-13T09:53:43","name":"instrument: Add basic event instrumentation","version":6,"mbox":"http://patchwork.ozlabs.org/series/2857/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/813377/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/813377/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsfRS3pmvz9s81\n\tfor ;\n\tWed, 13 Sep 2017 21:23:16 +1000 (AEST)","from localhost ([::1]:41653 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1ds5lC-0001Cw-Lr\n\tfor incoming@patchwork.ozlabs.org; Wed, 13 Sep 2017 07:23:14 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:56272)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1ds5ko-0001Al-MJ\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 07:22:52 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1ds5kl-0001O3-Eh\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 07:22:50 -0400","from roura.ac.upc.es ([147.83.33.10]:47411)\n\tby eggs.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1ds5kk-0001NR-VU\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 07:22:47 -0400","from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91])\n\tby roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8DBMhZ8010459;\n\tWed, 13 Sep 2017 13:22:43 +0200","from localhost (unknown [132.68.137.204])\n\tby correu-1.ac.upc.es (Postfix) with ESMTPSA id 1DD5E96A;\n\tWed, 13 Sep 2017 13:22:38 +0200 (CEST)"],"From":"=?utf-8?b?TGx1w61z?= Vilanova ","To":"qemu-devel@nongnu.org","Date":"Wed, 13 Sep 2017 14:22:37 +0300","Message-Id":"<150530175686.10902.13435538263886289800.stgit@frigg.lan>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<150529642278.10902.18234057937634437857.stgit@frigg.lan>","References":"<150529642278.10902.18234057937634437857.stgit@frigg.lan>","User-Agent":"StGit/0.18","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"quoted-printable","X-MIME-Autoconverted":"from 8bit to quoted-printable by roura.ac.upc.es id\n\tv8DBMhZ8010459","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy]","X-Received-From":"147.83.33.10","Subject":"[Qemu-devel] [PATCH v6 22/22] instrument: Add API to manipulate\n\tguest memory","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"\"Emilio G. Cota\" , Markus Armbruster ,\n\tStefan Hajnoczi , =?utf-8?q?Llu=C3=ADs_Vilanova?=\n\t","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"It includes access to the guest's memory and vCPU registers.\n\nSigned-off-by: Lluís Vilanova \n---\n instrument/Makefile.objs | 1 \n instrument/qemu-instr/state.h | 104 +++++++++++++++++++++++++++++++++++++++++\n instrument/state.c | 73 +++++++++++++++++++++++++++++\n 3 files changed, 178 insertions(+)\n create mode 100644 instrument/qemu-instr/state.h\n create mode 100644 instrument/state.c","diff":"diff --git a/instrument/Makefile.objs b/instrument/Makefile.objs\nindex d7e6c760c3..ee482bdb45 100644\n--- a/instrument/Makefile.objs\n+++ b/instrument/Makefile.objs\n@@ -5,3 +5,4 @@ target-obj-$(CONFIG_INSTRUMENT) += load.o\n target-obj-$(CONFIG_INSTRUMENT) += qmp.o\n target-obj-$(CONFIG_INSTRUMENT) += control.o\n target-obj-$(CONFIG_INSTRUMENT) += trace.o\n+target-obj-$(CONFIG_INSTRUMENT) += state.o\ndiff --git a/instrument/qemu-instr/state.h b/instrument/qemu-instr/state.h\nnew file mode 100644\nindex 0000000000..0ae6255fe5\n--- /dev/null\n+++ b/instrument/qemu-instr/state.h\n@@ -0,0 +1,104 @@\n+/*\n+ * Interface for accessing guest state.\n+ *\n+ * Copyright (C) 2012-2017 Lluís Vilanova \n+ *\n+ * This work is licensed under the terms of the GNU GPL, version 2 or later.\n+ * See the COPYING file in the top-level directory.\n+ */\n+\n+#ifndef QI__STATE_H\n+#define QI__STATE_H\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include \n+\n+\n+/**\n+ * qi_mem_read_virt:\n+ * @vcpu: CPU to use for address translation.\n+ * @vaddr: Starting virtual address to read from.\n+ * @size: Number of bytes to read.\n+ * @buf: Buffer to write into.\n+ *\n+ * Read contents from virtual memory.\n+ *\n+ * Returns: Whether the range of virtual addresses to read could be translated.\n+ *\n+ * Warning: Even on error, some of the destination buffer might have been\n+ * modified.\n+ *\n+ * Precondition: The output buffer has at least \"size\" bytes.\n+ */\n+bool qi_mem_read_virt(QICPU vcpu, uint64_t vaddr, size_t size, void *buf);\n+\n+/**\n+ * qi_mem_write_virt:\n+ * @vcpu: CPU to use for address translation.\n+ * @vaddr: Starting virtual address to write into.\n+ * @size: Number of bytes to write.\n+ * @buf: Buffer with the contents to write from.\n+ *\n+ * Write contents into virtual memory.\n+ *\n+ * Returns: Whether the range of virtual addresses to write could be translated.\n+ *\n+ * Warning: Even on error, some of the destination memory might have been\n+ * modified.\n+ * Precondition: The input buffer has at least \"size\" bytes.\n+ */\n+bool qi_mem_write_virt(QICPU vcpu, uint64_t vaddr, size_t size, void *buf);\n+\n+/**\n+ * qi_mem_virt_to_phys:\n+ * @vcpu: CPU to use for address translation.\n+ * @vaddr: Virtual address to translate.\n+ * @paddr: Pointer to output physical address.\n+ *\n+ * Translate a virtual address into a physical address.\n+ *\n+ * Returns: Whether the address could be translated.\n+ */\n+bool qi_mem_virt_to_phys(QICPU vcpu, uint64_t vaddr, uint64_t *paddr);\n+\n+/**\n+ * qi_mem_read_phys:\n+ * @paddr: Starting physical address to read from.\n+ * @size: Number of bytes to read.\n+ * @buf: Buffer to write into.\n+ *\n+ * Read contents from physical memory.\n+ *\n+ * Returns: Whether the range of physical addresses is valid.\n+ *\n+ * Warning: Even on error, some of the destination buffer might have been\n+ * modified.\n+ * Precondition: The output buffer has at least \"size\" bytes.\n+ */\n+bool qi_mem_read_phys(uint64_t paddr, size_t size, void *buf);\n+\n+/**\n+ * qi_mem_write_phys:\n+ * @paddr: Starting physical address to write into.\n+ * @size: Number of bytes to write.\n+ * @buf: Buffer with the contents to write from.\n+ *\n+ * Write contents into virtual memory.\n+ *\n+ * Returns: Whether the range of physical addresses is valid.\n+ *\n+ * Warning: Even on error, some of the destination memory might have been\n+ * modified.\n+ *\n+ * Precondition: The input buffer has at least \"size\" bytes.\n+ */\n+bool qi_mem_write_phys(uint64_t paddr, size_t size, void *buf);\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* QI__STATE_H */\ndiff --git a/instrument/state.c b/instrument/state.c\nnew file mode 100644\nindex 0000000000..e76fd5fbcd\n--- /dev/null\n+++ b/instrument/state.c\n@@ -0,0 +1,73 @@\n+/*\n+ * Interface for accessing guest state.\n+ *\n+ * Copyright (C) 2012-2017 Lluís Vilanova \n+ *\n+ * This work is licensed under the terms of the GNU GPL, version 2 or later.\n+ * See the COPYING file in the top-level directory.\n+ */\n+\n+#include \"qemu/osdep.h\"\n+\n+#include \"qemu/compiler.h\"\n+#include \"cpu.h\"\n+#include \"exec/cpu-all.h\"\n+#include \"instrument/control.h\"\n+#include \"instrument/error.h\"\n+#include \"instrument/qemu-instr/state.h\"\n+\n+\n+SYM_PUBLIC bool qi_mem_read_virt(QICPU vcpu, uint64_t vaddr,\n+ size_t size, void *buf)\n+{\n+ CPUState *vcpu_ = instr_cpu_from_qicpu(vcpu);\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+ ERROR_IF_RET(!vcpu_, false, \"invalid QICPU\");\n+ return cpu_memory_rw_debug(vcpu_, vaddr, buf, size, 0) == 0;\n+}\n+\n+SYM_PUBLIC bool qi_mem_write_virt(QICPU vcpu, uint64_t vaddr,\n+ size_t size, void *buf)\n+{\n+ CPUState *vcpu_ = instr_cpu_from_qicpu(vcpu);\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+ ERROR_IF_RET(!vcpu_, false, \"invalid QICPU\");\n+ return cpu_memory_rw_debug(vcpu_, vaddr, buf, size, 1) == 0;\n+}\n+\n+SYM_PUBLIC bool qi_mem_virt_to_phys(QICPU vcpu, uint64_t vaddr, uint64_t *paddr)\n+{\n+ CPUState *vcpu_ = instr_cpu_from_qicpu(vcpu);\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+ ERROR_IF_RET(!vcpu_, false, \"invalid QICPU\");\n+\n+#if defined(CONFIG_USER_ONLY)\n+ *paddr = vaddr;\n+ return true;\n+#else\n+ *paddr = cpu_get_phys_page_debug(vcpu_, vaddr);\n+ return *paddr != -1;\n+#endif\n+}\n+\n+SYM_PUBLIC bool qi_mem_read_phys(uint64_t paddr, size_t size, void *buf)\n+{\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+#if defined(CONFIG_USER_ONLY)\n+ return cpu_memory_rw_debug(NULL, paddr, buf, size, 0) == 0;\n+#else\n+ cpu_physical_memory_read(paddr, buf, size);\n+ return true;\n+#endif\n+}\n+\n+SYM_PUBLIC bool qi_mem_write_phys(uint64_t paddr, size_t size, void *buf)\n+{\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+#if defined(CONFIG_USER_ONLY)\n+ return cpu_memory_rw_debug(NULL, paddr, buf, size, 1) == 0;\n+#else\n+ cpu_physical_memory_write(paddr, buf, size);\n+ return true;\n+#endif\n+}\n","prefixes":["v6","22/22"]}