{"id":813345,"url":"http://patchwork.ozlabs.org/api/1.2/patches/813345/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/150530029934.10902.9014791028754849043.stgit@frigg.lan/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<150530029934.10902.9014791028754849043.stgit@frigg.lan>","list_archive_url":null,"date":"2017-09-13T10:58:19","name":"[v6,16/22] instrument: Add event 'guest_cpu_reset'","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"426cc12263075dea14711bff2f404574ad0904d2","submitter":{"id":9099,"url":"http://patchwork.ozlabs.org/api/1.2/people/9099/?format=json","name":"Lluís Vilanova","email":"vilanova@ac.upc.edu"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/150530029934.10902.9014791028754849043.stgit@frigg.lan/mbox/","series":[{"id":2857,"url":"http://patchwork.ozlabs.org/api/1.2/series/2857/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2857","date":"2017-09-13T09:53:43","name":"instrument: Add basic event instrumentation","version":6,"mbox":"http://patchwork.ozlabs.org/series/2857/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/813345/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/813345/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsdvQ1Wzmz9s78\n\tfor ;\n\tWed, 13 Sep 2017 20:58:57 +1000 (AEST)","from localhost ([::1]:41536 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1ds5Ne-0004Qm-Ms\n\tfor incoming@patchwork.ozlabs.org; Wed, 13 Sep 2017 06:58:54 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:40770)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1ds5NJ-0004Qf-6X\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 06:58:34 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1ds5NG-0003RQ-1v\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 06:58:33 -0400","from roura.ac.upc.edu ([147.83.33.10]:42933 helo=roura.ac.upc.es)\n\tby eggs.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1ds5NF-0003Py-Kl\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 06:58:29 -0400","from correu-2.ac.upc.es (correu-2.ac.upc.es [147.83.30.92])\n\tby roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8DAwQMm009595;\n\tWed, 13 Sep 2017 12:58:26 +0200","from localhost (unknown [132.68.137.204])\n\tby correu-2.ac.upc.es (Postfix) with ESMTPSA id 8795F39C;\n\tWed, 13 Sep 2017 12:58:20 +0200 (CEST)"],"From":"=?utf-8?b?TGx1w61z?= Vilanova ","To":"qemu-devel@nongnu.org","Date":"Wed, 13 Sep 2017 13:58:19 +0300","Message-Id":"<150530029934.10902.9014791028754849043.stgit@frigg.lan>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<150529642278.10902.18234057937634437857.stgit@frigg.lan>","References":"<150529642278.10902.18234057937634437857.stgit@frigg.lan>","User-Agent":"StGit/0.18","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"quoted-printable","X-MIME-Autoconverted":"from 8bit to quoted-printable by roura.ac.upc.es id\n\tv8DAwQMm009595","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy]","X-Received-From":"147.83.33.10","Subject":"[Qemu-devel] [PATCH v6 16/22] instrument: Add event\n\t'guest_cpu_reset'","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Markus Armbruster , \"Emilio G. Cota\" ,\n\tStefan Hajnoczi ,\n\tPaolo Bonzini , =?utf-8?q?Llu=C3=ADs_Vilanova?=\n\t","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Signed-off-by: Lluís Vilanova \n---\n instrument/control.c | 9 +++++++++\n instrument/events.h | 3 +++\n instrument/events.inc.h | 11 +++++++++++\n instrument/load.c | 1 +\n instrument/qemu-instr/control.h | 9 +++++++++\n qom/cpu.c | 2 ++\n stubs/instrument.c | 1 +\n 7 files changed, 36 insertions(+)","diff":"diff --git a/instrument/control.c b/instrument/control.c\nindex 7ed4bf3505..cb397639ce 100644\n--- a/instrument/control.c\n+++ b/instrument/control.c\n@@ -134,3 +134,12 @@ SYM_PUBLIC void qi_event_set_guest_cpu_exit(void (*fn)(QICPU vcpu))\n ERROR_IF(!instr_get_state(), \"called outside instrumentation\");\n instr_set_event(guest_cpu_exit, fn);\n }\n+\n+\n+void (*instr_event__guest_cpu_reset)(QICPU vcpu);\n+\n+SYM_PUBLIC void qi_event_set_guest_cpu_reset(void (*fn)(QICPU vcpu))\n+{\n+ ERROR_IF(!instr_get_state(), \"called outside instrumentation\");\n+ instr_set_event(guest_cpu_reset, fn);\n+}\ndiff --git a/instrument/events.h b/instrument/events.h\nindex c743cb8180..4a0560490a 100644\n--- a/instrument/events.h\n+++ b/instrument/events.h\n@@ -39,6 +39,9 @@ static inline void instr_guest_cpu_enter(CPUState *vcpu);\n extern void (*instr_event__guest_cpu_exit)(QICPU vcpu);\n static inline void instr_guest_cpu_exit(CPUState *vcpu);\n \n+extern void (*instr_event__guest_cpu_reset)(QICPU vcpu);\n+static inline void instr_guest_cpu_reset(CPUState *vcpu);\n+\n \n #include \"instrument/events.inc.h\"\n \ndiff --git a/instrument/events.inc.h b/instrument/events.inc.h\nindex c88df7e42f..a126ba5ae6 100644\n--- a/instrument/events.inc.h\n+++ b/instrument/events.inc.h\n@@ -31,3 +31,14 @@ static inline void instr_guest_cpu_exit(CPUState *vcpu)\n instr_set_state(INSTR_STATE_DISABLE);\n }\n }\n+\n+static inline void instr_guest_cpu_reset(CPUState *vcpu)\n+{\n+ void (*cb)(QICPU vcpu) = instr_get_event(guest_cpu_reset);\n+ if (cb) {\n+ QICPU vcpu_ = instr_cpu_to_qicpu(vcpu);\n+ instr_set_state(INSTR_STATE_ENABLE);\n+ (*cb)(vcpu_);\n+ instr_set_state(INSTR_STATE_DISABLE);\n+ }\n+}\ndiff --git a/instrument/load.c b/instrument/load.c\nindex 6808d361b5..8c15a73a8c 100644\n--- a/instrument/load.c\n+++ b/instrument/load.c\n@@ -161,6 +161,7 @@ InstrUnloadError instr_unload(const char *id)\n instr_set_event(fini_fn, NULL);\n instr_set_event(guest_cpu_enter, NULL);\n instr_set_event(guest_cpu_exit, NULL);\n+ instr_set_event(guest_cpu_reset, NULL);\n \n instr_cpu_stop_all_end(&info);\n cpu_list_unlock();\ndiff --git a/instrument/qemu-instr/control.h b/instrument/qemu-instr/control.h\nindex 107ee8afe0..322009100d 100644\n--- a/instrument/qemu-instr/control.h\n+++ b/instrument/qemu-instr/control.h\n@@ -96,6 +96,15 @@ void qi_event_set_guest_cpu_enter(void (*fn)(QICPU vcpu));\n */\n void qi_event_set_guest_cpu_exit(void (*fn)(QICPU vcpu));\n \n+/*\n+ * Reset the state of a virtual (guest) CPU.\n+ *\n+ * Mode: user, softmmu\n+ * Targets: all\n+ * Time: exec\n+ */\n+void qi_event_set_guest_cpu_reset(void (*fn)(QICPU vcpu));\n+\n #ifdef __cplusplus\n }\n #endif\ndiff --git a/qom/cpu.c b/qom/cpu.c\nindex dc5392dbeb..6336d63f66 100644\n--- a/qom/cpu.c\n+++ b/qom/cpu.c\n@@ -19,6 +19,7 @@\n */\n \n #include \"qemu/osdep.h\"\n+#include \"instrument/events.h\"\n #include \"qapi/error.h\"\n #include \"qemu-common.h\"\n #include \"qom/cpu.h\"\n@@ -275,6 +276,7 @@ void cpu_reset(CPUState *cpu)\n (*klass->reset)(cpu);\n }\n \n+ instr_guest_cpu_reset(cpu);\n trace_guest_cpu_reset(cpu);\n }\n \ndiff --git a/stubs/instrument.c b/stubs/instrument.c\nindex e7adea1aad..752c66e3a4 100644\n--- a/stubs/instrument.c\n+++ b/stubs/instrument.c\n@@ -44,3 +44,4 @@ void qmp_instr_unload(const char *id, Error **errp)\n __thread InstrState instr_cur_state;\n void (*instr_event__guest_cpu_enter)(QICPU *vcpu);\n void (*instr_event__guest_cpu_exit)(QICPU *vcpu);\n+void (*instr_event__guest_cpu_reset)(QICPU *vcpu);\n","prefixes":["v6","16/22"]}